17934959. SEMICONDUCTOR DEVICE HAVING WORD LINE SEPARATION LAYER simplified abstract (Samsung Electronics Co., Ltd.)
SEMICONDUCTOR DEVICE HAVING WORD LINE SEPARATION LAYER
Organization Name
Inventor(s)
Daehyun Jang of Hwaseong-si (KR)
Sangjun Hong of Hwaseong-si (KR)
SEMICONDUCTOR DEVICE HAVING WORD LINE SEPARATION LAYER - A simplified explanation of the abstract
This abstract first appeared for US patent application 17934959 titled 'SEMICONDUCTOR DEVICE HAVING WORD LINE SEPARATION LAYER
Simplified Explanation
The patent application describes a semiconductor device with a peripheral circuit structure and a cell array area. The device includes a lower stack and an upper stack, with multiple insulating layers and word lines stacked alternately in the upper stack. There are also channel structures that extend through both stacks in the cell array area. Additionally, there are separation insulating layers that extend vertically through both stacks and horizontally, spaced apart from each other. A word line separation layer is located at the upper portion of the lower stack and crosses the separation insulating layers, extending vertically through at least one of the lower word lines.
- The semiconductor device includes a peripheral circuit structure and a cell array area.
- It has a lower stack and an upper stack, with insulating layers and word lines stacked alternately in the upper stack.
- Channel structures extend through both stacks in the cell array area.
- Separation insulating layers are present, extending vertically through both stacks and horizontally, spaced apart from each other.
- A word line separation layer is located at the upper portion of the lower stack and crosses the separation insulating layers, extending vertically through at least one of the lower word lines.
Potential Applications
This technology can be applied in various semiconductor devices, such as memory chips, microprocessors, and integrated circuits.
Problems Solved
The patent application addresses the need for improved semiconductor devices with efficient peripheral circuit structures and cell array areas.
Benefits
The described semiconductor device offers improved performance and functionality due to its unique structure. It allows for better integration of components and enhanced efficiency in data storage and processing.
Original Abstract Submitted
A semiconductor device includes a peripheral circuit structure; a lower stack disposed on the peripheral circuit structure and an upper stack disposed in the lower stack including a plurality of lower insulating layers and a plurality of lower word lines alternately stacked with the lower insulating layers; a plurality of channel structures extending through the lower stack and the upper stack in the cell array area; a pair of separation insulating layers extending vertically through the lower stack and the upper stack and extending in a horizontal direction, the pair of separation insulating layers being spaced apart from each other in a vertical direction; and a word line separation layer disposed at an upper portion of the lower stack and crossing the pair of separation insulating layers when viewed in a plan view, the word line separation layer extending vertically through at least one of the lower word lines.
