17934023. CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE simplified abstract (QUALCOMM Incorporated)
Contents
- 1 CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 How does the polymer layer affect the overall cost of manufacturing the circuit package?
- 1.11 What is the environmental impact of using the polymer layer in circuit packages?
- 1.12 Original Abstract Submitted
CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE
Organization Name
Inventor(s)
Yangyang Sun of San Diego CA (US)
Dongming He of San Diego CA (US)
CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17934023 titled 'CIRCUIT PACKAGES WITH BUMP INTERCONNECT POLYMER SURROUND AND METHOD OF MANUFACTURE
Simplified Explanation
The circuit package described in the patent application includes a polymer layer around the bump interconnects, which helps reduce shorts between the interconnects and minimizes underfill delamination. The polymer layer is placed on the surface of the first component and around the bump interconnects, as well as on the side surfaces of the interconnects.
- The circuit package includes a first component connected to a second component through bump interconnects.
- The bump interconnects pass logic signals, data signals, and power between the components.
- The polymer layer around the bump interconnects reduces shorts and underfill delamination.
- The polymer layer is placed on the surface of the first component and around the bump interconnects.
Potential Applications
The technology described in the patent application could be applied in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics where circuit packages are used.
Problems Solved
The technology helps reduce shorts between bump interconnects and minimizes underfill delamination, which are common issues in circuit packages.
Benefits
The polymer layer around the bump interconnects provides improved reliability and durability to the circuit package, leading to longer lifespan and better performance.
Potential Commercial Applications
The technology could be utilized by electronics manufacturers to enhance the quality and reliability of their products, ultimately leading to increased customer satisfaction and brand loyalty.
Possible Prior Art
One possible prior art could be the use of underfill materials in circuit packages to prevent delamination issues. However, the specific application of a polymer layer around bump interconnects to reduce shorts is a unique aspect of this technology.
Unanswered Questions
How does the polymer layer affect the overall cost of manufacturing the circuit package?
The patent application does not provide information on the cost implications of incorporating the polymer layer. Further research or analysis would be needed to determine the impact on manufacturing costs.
What is the environmental impact of using the polymer layer in circuit packages?
The environmental considerations of using the polymer layer, such as its recyclability or potential for disposal, are not addressed in the patent application. Additional studies would be required to assess the environmental impact of this technology.
Original Abstract Submitted
Circuit packages with a polymer layer around the bump interconnects have a reduced number of shorts between the bump interconnects and have reduced underfill delamination. The circuit package includes a first component coupled to a second component through a plurality of bump interconnects employed for passing logic signals, data signals, and/or power. The bump interconnects extend from a surface of the first component and are coupled to contact pads on an opposing surface of the second component. The side surfaces of the bump interconnects extend in a direction from the second component to the first. The circuit package includes the polymer layer disposed on the surface of the first component around the bump interconnects and on the side surfaces of the bump interconnects. The polymer layer reduces shorts between the side surfaces of adjacent bump interconnects and reduces delamination of an underfill disposed between the first and second components.
