17933568. VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS simplified abstract (QUALCOMM Incorporated)
Contents
- 1 VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS
Organization Name
Inventor(s)
Junjing Bao of San Diego CA (US)
Giridhar Nallapati of San Diego CA (US)
VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17933568 titled 'VERTICAL CHANNEL FIELD EFFECT TRANSISTOR (VCFET) WITH REDUCED CONTACT RESISTANCE AND/OR PARASITIC CAPACITANCE, AND RELATED FABRICATION METHODS
Simplified Explanation
The abstract describes a patent application for Vertical Channel Field-Effect Transistors (VCFETs) with reduced contact resistance and/or parasitic capacitance. Here is a simplified explanation of the patent application:
- The VCFET has a semiconductor structure at the end of the vertical channel with an expanded width in the horizontal direction to reduce contact resistance.
- The spacer between the gate and contact of the VCFET includes one or more air gaps to reduce parasitic capacitance.
- The air spacer(s) in the VCFET is elongated in the horizontal direction to further reduce parasitic capacitance.
Potential Applications
The technology described in the patent application could be applied in various electronic devices such as smartphones, tablets, computers, and other integrated circuits.
Problems Solved
This technology addresses the issues of high contact resistance and parasitic capacitance in VCFETs, which can improve the overall performance and efficiency of electronic devices.
Benefits
The benefits of this technology include enhanced device performance, reduced power consumption, improved reliability, and potentially lower production costs.
Potential Commercial Applications
The technology could be utilized in the semiconductor industry for manufacturing advanced electronic components with improved performance and efficiency.
Possible Prior Art
One possible prior art could be the use of different materials or structures to reduce contact resistance and parasitic capacitance in field-effect transistors.
Unanswered Questions
How does this technology compare to existing solutions for reducing contact resistance and parasitic capacitance in field-effect transistors?
This technology offers a unique approach to addressing contact resistance and parasitic capacitance in VCFETs by utilizing an expanded semiconductor structure and air gaps in the spacer. It would be interesting to compare its effectiveness and efficiency with other existing solutions in the field.
What are the potential challenges or limitations of implementing this technology in practical electronic devices?
While the patent application describes innovative methods to reduce contact resistance and parasitic capacitance in VCFETs, there may be challenges in scaling up production, integrating the technology into existing manufacturing processes, or ensuring compatibility with other components in electronic devices. Further research and development may be needed to address these potential challenges.
Original Abstract Submitted
Vertical channel field-effect transistors (VCFETs) with reduced contact resistance and/or parasitic capacitance, and related fabrication methods. In exemplary aspects, to reduce contact resistance of the VCFET, an end portion of the vertical channel has a semiconductor structure that has an expanded width in the horizontal direction parallel to the substrate surface. This provides a greater area to form a contact for a source/drain to reduce contact resistance of the VCFET. To reduce the parasitic capacitance between the gate and a contact of the VCFET, the spacer includes one or more air gaps that form an air spacer(s) between the gate and the contact to reduce the overall average permittivity of the spacer. In one example, the air spacer(s) of the VCFET is elongated in the horizontal direction parallel to the substrate surface (and perpendicular to the vertical direction of the vertical channel) to further reduce the parasitic capacitance.
