17931935. SUSPENDING MEMORY ERASE OPERATIONS TO PERFORM HIGHER PRIORITY MEMORY COMMANDS simplified abstract (Micron Technology, Inc.)

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SUSPENDING MEMORY ERASE OPERATIONS TO PERFORM HIGHER PRIORITY MEMORY COMMANDS

Organization Name

Micron Technology, Inc.

Inventor(s)

Shakeel Isamohiuddin Bukhari of San Jose CA (US)

Mark Ish of Manassas VA (US)

SUSPENDING MEMORY ERASE OPERATIONS TO PERFORM HIGHER PRIORITY MEMORY COMMANDS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17931935 titled 'SUSPENDING MEMORY ERASE OPERATIONS TO PERFORM HIGHER PRIORITY MEMORY COMMANDS

Simplified Explanation

Implementations described herein involve suspending memory erase operations to prioritize high priority memory commands. In some implementations, a memory device can detect a pending memory command with higher priority while an active stage of an erase operation is ongoing. The memory device can selectively suspend the erase operation to allow the pending memory command to be executed, based on the stage of the erase operation and a suspend determination timer.

  • Memory device can suspend erase operation to prioritize high priority memory commands
  • Detection of pending memory command with higher priority during active stage of erase operation
  • Selective suspension of erase operation based on stage of operation and suspend determination timer

Potential Applications

  • Data storage devices
  • Embedded systems
  • Real-time processing systems

Problems Solved

  • Prioritizing high priority memory commands over erase operations
  • Efficient memory management
  • Improved system performance

Benefits

  • Enhanced system responsiveness
  • Improved data processing efficiency
  • Optimal memory resource utilization


Original Abstract Submitted

Implementations described herein relate to suspending memory erase operations to perform high priority memory commands. In some implementations, a memory device may detect, while an active stage of an erase operation is being performed by the memory device, a pending memory command with a higher priority than the erase operation. The memory device may selectively suspend the active stage of the erase operation, to allow the pending memory command to be executed, based on the active stage of the erase operation that is being performed and/or a value of a suspend determination timer associated with suspending the active stage of the erase operation.