17931767. INTEGRATED CIRCUIT CHIP WITH BACKSIDE POWER DELIVERY AND MULTIPLE TYPES OF BACKSIDE TO FRONTSIDE VIAS simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

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INTEGRATED CIRCUIT CHIP WITH BACKSIDE POWER DELIVERY AND MULTIPLE TYPES OF BACKSIDE TO FRONTSIDE VIAS

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Brent A. Anderson of Jericho VT (US)

Nicholas Anthony Lanzillo of Wynantskill NY (US)

Ruilong Xie of Niskayuna NY (US)

Lawrence A. Clevenger of Saratoga Springs NY (US)

Albert M. Chu of Nashua NH (US)

Nicholas Alexander Polomoff of Hopewell Junction NY (US)

INTEGRATED CIRCUIT CHIP WITH BACKSIDE POWER DELIVERY AND MULTIPLE TYPES OF BACKSIDE TO FRONTSIDE VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17931767 titled 'INTEGRATED CIRCUIT CHIP WITH BACKSIDE POWER DELIVERY AND MULTIPLE TYPES OF BACKSIDE TO FRONTSIDE VIAS

Simplified Explanation

The semiconductor device described in the patent application includes two vias connecting the frontside and backside of the device to different wiring levels.

  • The semiconductor device has a first via connecting the backside to the frontside.
  • There is a second via connecting the backside to the frontside.
  • Both vias are directly connected to different wiring levels on either side.

Potential Applications

This technology could be applied in:

  • Integrated circuits
  • Microprocessors
  • Memory devices

Problems Solved

This technology helps in:

  • Improving signal transmission
  • Enhancing electrical connectivity
  • Increasing efficiency of semiconductor devices

Benefits

The benefits of this technology include:

  • Better performance of semiconductor devices
  • Enhanced reliability
  • Improved overall functionality

Potential Commercial Applications

Optimizing semiconductor devices with multiple vias can be beneficial for:

  • Electronics manufacturers
  • Semiconductor companies
  • Research institutions


Original Abstract Submitted

A semiconductor device that includes a first via connecting a backside of the semiconductor device to a frontside of the semiconductor device, and a second via connecting the backside of the semiconductor device to the frontside of the semiconductor device. The first via and the second via are directly connected to at least one different wiring level on the frontside or the backside.