17931537. SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
Contents
- 1 SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Original Abstract Submitted
SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
Geoffrey Burr of Cupertino CA (US)
Shubham Jain of Elmsford NY (US)
Milos Stanisavljevic of Langnau am Albis (CH)
Yasuteru Kohda of Yamato-shi (JP)
SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET - A simplified explanation of the abstract
This abstract first appeared for US patent application 17931537 titled 'SPECIAL-PURPOSE DIGITAL-COMPUTE HARDWARE FOR EFFICIENT ELEMENT-WISE AGGREGATION, SCALING AND OFFSET
Simplified Explanation
The patent application describes an efficient pipelined implementation of digital scaling, offset, and aggregation operations supporting programmable scale and offset factors for each element.
- Time-multiplexed parallel pipelining of digital data words encoding N-bit signed integers
- Data words can be stored in a dedicated first memory, second memory, or directed to fused-multiply-add units
- Multiplying each data word by a corresponding data word from the first memory and adding it to a corresponding data word from the second memory to form output sum-and-product data words
Potential Applications
This technology could be applied in digital signal processing, image processing, audio processing, and other applications requiring efficient scaling, offset, and aggregation operations.
Problems Solved
1. Streamlining digital scaling, offset, and aggregation operations 2. Enhancing the efficiency of processing large sets of digital data 3. Enabling programmable scale and offset factors for each element
Benefits
1. Improved performance in processing digital data 2. Flexibility in adjusting scale and offset factors 3. Enhanced accuracy in scaling and aggregation operations
Potential Commercial Applications
Optimizing Digital Signal Processing with Efficient Scaling and Aggregation Operations
Original Abstract Submitted
An efficient pipelined implementation of digital scaling, offset and aggregation operation supports element-by-element programmable scale and offset factors. The method includes time-multiplexed parallel pipelining of a plurality of digital data words, each of the plurality of digital data words encoding an N-bit signed integer, from one of a plurality of receive-registers through a datapath that can either (1) store the plurality of digital data words directly in a dedicated first memory, (2) store the plurality of digital data words directly in a dedicated second memory, or (3) direct the plurality of digital data words into a parallel set of fused-multiply-add units. The method further includes multiplying each digital data word by a corresponding data-word retrieved from the dedicated first memory to form product data words and adding the product data words to a corresponding data-word retrieved from the dedicated second memory to form an output sum-and-product data words.
