17931096. Receiver with Feed Forward Equalization simplified abstract (Apple Inc.)

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Receiver with Feed Forward Equalization

Organization Name

Apple Inc.

Inventor(s)

Bo Sun of Carlsbad CA (US)

Jafar Savoj of Sunnyvale CA (US)

Receiver with Feed Forward Equalization - A simplified explanation of the abstract

This abstract first appeared for US patent application 17931096 titled 'Receiver with Feed Forward Equalization

Simplified Explanation

The patent application discloses a receiver with feed-forward equalization, including a delay circuit, front-end circuit, sample circuit, and recovery circuit.

  • The delay circuit receives a signal encoding a serial data stream and generates delayed signals using T-coil circuits.
  • The front-end circuit generates an equalized signal using the original signal and the delayed signals.
  • The sample circuit samples the equalized signal to generate samples.
  • The recovery circuit generates recovered data symbols using the samples.

Potential Applications

This technology can be applied in high-speed data communication systems, such as in telecommunications, networking, and data storage.

Problems Solved

This technology helps in reducing signal distortion and improving the quality of data transmission over long distances or in noisy environments.

Benefits

The use of feed-forward equalization improves signal integrity, increases data transmission speeds, and enhances overall system performance.

Potential Commercial Applications

Optimizing Data Transmission with Feed-Forward Equalization Technology


Original Abstract Submitted

A receiver with feed-forward equalization is disclosed. A receiver includes a delay circuit configured to receive a first signal that encodes a serial data stream having a plurality of data symbols. The delay circuit includes at least one T-coil circuit and is configured to generate a plurality of delayed signals using the first signal. The receiver further includes a front-end circuit configured to generate an equalized signal using the at first signal and one or more delayed signals of the plurality of delayed signals. A sample circuit is configured to sample the equalized signal to generate a plurality of samples. A recovery circuit configured to generate a plurality of recovered data symbols using the plurality of samples.