17930942. MEMORY MODULE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
MEMORY MODULE
Organization Name
Inventor(s)
MEMORY MODULE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17930942 titled 'MEMORY MODULE
Simplified Explanation
The patent application describes a memory module that includes a module substrate and at least one semiconductor package on the module substrate. The semiconductor package has a package substrate with lower and upper surfaces.
- The lower surface of the package substrate has two groups of lower pads, while the upper surface has upper pads that are electrically connected to the lower pads of the first group.
- A chip structure is present on the upper surface of the package substrate and is electrically connected to the upper pads.
- First connection bumps connect the lower pads of the first group to the module substrate, while second connection bumps connect the lower pads of the second group to the module substrate.
- The first connection bumps have a maximum width at a specific distance from the package substrate, and the second connection bumps have a maximum width at a shorter distance from the package substrate.
Potential applications of this technology:
- Memory modules for electronic devices such as computers, smartphones, and tablets.
- Data storage systems for servers and data centers.
Problems solved by this technology:
- Efficient and reliable electrical connection between the semiconductor package and the module substrate.
- Improved performance and functionality of memory modules.
Benefits of this technology:
- Enhanced data transfer speeds and overall memory module performance.
- Increased reliability and durability of memory modules.
- Compact design and space-saving for electronic devices.
Original Abstract Submitted
A memory module, includes a module substrate and at least one semiconductor package on the module substrate that includes a package substrate having a lower surface and an upper surface. First and second groups of lower pads are on the lower surface, and upper pads are on the upper surface and are electrically connected to the lower pads of the first group. A chip structure is on the upper surface of the package substrate and is electrically connected to the upper pads. First connection bumps connect the lower pads of the first group to the module substrate, and second connection bumps connect the lower pads of the second group to the module substrate. The first connection bumps have a first maximum width at a first distance from the package substrate, and the second connection bumps have a second maximum width at a second, shorter distance from the package substrate.
