17930825. FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS simplified abstract (Intel Corporation)
Contents
- 1 FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Unanswered Questions
- 1.10 Original Abstract Submitted
FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS
Organization Name
Inventor(s)
Abhishek A. Sharma of Hillsboro OR (US)
Tahir Ghani of Portland OR (US)
Wilfred Gomes of Portland OR (US)
Anand S. Murthy of Portland OR (US)
Pushkar Sharad Ranade of San Jose CA (US)
Sagar Suthram of Portland OR (US)
FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17930825 titled 'FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS
Simplified Explanation
The patent application describes full wafer devices with passive devices formed in interconnect layers, created using an additive process resulting in a seam within the passive device.
- Passive devices formed in one or more interconnect layers
- Additive process used to create passive devices with a seam running through them
- Seam can be an air gap, change in material structure, or region with different chemical makeup
- Passive devices can be formed in global interconnect layers coupling multiple dies of the full wafer device
Potential Applications
The technology described in the patent application could be applied in the following areas:
- Semiconductor manufacturing
- Integrated circuit design
- Electronics industry
Problems Solved
The innovation addresses the following issues:
- Efficient formation of passive devices in full wafer devices
- Enhancing interconnect layers in semiconductor devices
- Improving overall performance and functionality of integrated circuits
Benefits
The technology offers the following benefits:
- Increased efficiency in manufacturing processes
- Enhanced functionality and performance of electronic devices
- Cost-effective production of full wafer devices
Potential Commercial Applications
The technology could find applications in various industries, including:
- Telecommunications
- Consumer electronics
- Automotive sector
Unanswered Questions
How does the additive process impact the overall reliability of the passive devices?
The article does not delve into the reliability aspect of the passive devices formed using the additive process. It would be interesting to explore how the seam affects the long-term performance and durability of the devices.
Are there any limitations to the size or complexity of the passive devices that can be formed using this technology?
The article does not mention any restrictions on the size or complexity of the passive devices that can be created. Further research could investigate the scalability and adaptability of the technology to different device specifications.
Original Abstract Submitted
Described herein are full wafer devices that include passive devices formed in one or more interconnect layers. Interconnect layers are formed over a front side of the full wafer device. A passive device is formed using an additive process that results in a seam running through the passive device. The seam may be, for example, an air gap, a change in material structure, or a region with a different chemical makeup from the surrounding passive device. In some embodiments, the passive devices are formed in global interconnect layers coupling multiple does of the full wafer device.
