17930801. FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS simplified abstract (Intel Corporation)
Contents
- 1 FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Unanswered Questions
- 1.10 Original Abstract Submitted
FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS
Organization Name
Inventor(s)
Abhishek A. Sharma of Hillsboro OR (US)
Tahir Ghani of Portland OR (US)
Wilfred Gomes of Portland OR (US)
Anand S. Murthy of Portland OR (US)
FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17930801 titled 'FULL WAFER DEVICE WITH BACK SIDE PASSIVE ELECTRONIC COMPONENTS
Simplified Explanation
The patent application describes full wafer devices with passive devices formed in a power delivery structure, where power is delivered to the device on the backside. The passive device in the backside layer is formed with a seam running through it, which could be an air gap, a change in material structure, or a region with a different chemical makeup.
- Passive devices formed in a power delivery structure
- Power delivered to the full wafer device on the backside
- Passive device in backside layer formed with a seam
- Seam could be an air gap, change in material structure, or region with different chemical makeup
Potential Applications
The technology described in this patent application could be applied in:
- Semiconductor manufacturing
- Power delivery systems
- Integrated circuits
Problems Solved
This technology helps address the following issues:
- Efficient power delivery in full wafer devices
- Integration of passive devices in power structures
- Seam formation in passive devices
Benefits
The benefits of this technology include:
- Improved power delivery efficiency
- Enhanced integration of passive devices
- Potential for increased functionality in full wafer devices
Potential Commercial Applications
- "Innovative Power Delivery Structures for Full Wafer Devices"
Unanswered Questions
How does the additive process impact the overall performance of the passive devices?
The patent application does not delve into the specific performance implications of the additive process on the passive devices.
Are there any limitations to the types of passive devices that can be formed using this technology?
The patent application does not discuss any potential limitations on the types of passive devices that can be formed with this technology.
Original Abstract Submitted
Described herein are full wafer devices that include passive devices formed in a power delivery structure. Power is delivered to the full wafer device on a backside of the full wafer device. A passive device in a backside layer is formed using an additive process that results in a seam running through the passive device. The seam may be, for example, an air gap, a change in material structure, or a region with a different chemical makeup from the surrounding passive device.
