17930739. GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)
Contents
- 1 GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Original Abstract Submitted
GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS
Organization Name
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s)
Tsung-Sheng Kang of Ballston Lake NY (US)
Tao Li of Slingerlands NY (US)
Ruilong Xie of Niskayuna NY (US)
Chih-Chao Yang of Glenmont NY (US)
GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17930739 titled 'GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS
Simplified Explanation
The microelectronic structure described in the patent application includes a first nano device with multiple transistors, a bottom dielectric isolation layer behind each transistor, and a continuous separating dielectric layer behind the bottom dielectric isolation layer.
- The first nano device consists of a plurality of transistors.
- Each transistor is supported by a bottom dielectric isolation layer on its backside.
- A separating dielectric layer, which is continuous, is located behind the bottom dielectric isolation layer for each transistor.
Potential Applications
This technology could be applied in:
- Nanoelectronics
- Semiconductor manufacturing
- Integrated circuit design
Problems Solved
This innovation addresses:
- Improved isolation between transistors
- Enhanced performance and reliability of nano devices
- Reduction of electrical interference
Benefits
The benefits of this technology include:
- Higher efficiency in microelectronic structures
- Increased durability of nano devices
- Enhanced overall performance of electronic systems
Potential Commercial Applications
Optimizing Nano Device Isolation for Improved Performance
Original Abstract Submitted
A microelectronic structure including a first nano device, where the first nano device includes a plurality of transistors. A bottom dielectric isolation located on the backside of each of the plurality of transistors of the first nano device. A separating dielectric layer located on the backside of the bottom dielectric isolation layer, where the separating dielectric layer is a continuous layer on the backside of each of the plurality of transistors of the first nano device.
