17930506. WORKLOAD AWARE EXERCISER DEVICE PLACEMENT simplified abstract (INTERNATIONAL BUSINESS MACHINES CORPORATION)

WORKLOAD AWARE EXERCISER DEVICE PLACEMENT

Organization Name

INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor(s)

Michael Romain of Beacon NY (US)

Lucas Dane Lalima of Poughkeepsie NY (US)

Michael Greene of Austin TX (US)

Alper Buyuktosunoglu of White Plains NY (US)

Christopher Joseph Berry of Red Hook NY (US)

Pawel Owczarczyk of HIGHLAND NY (US)

Mark Cichanowski of Hutto TX (US)

William V. Huott of Holmes NY (US)

OFER Geva of Poughkeepsie NY (US)

Jesse Peter Surprise of Highland NY (US)

Eduard Herkel of Suttgart (DE)

WORKLOAD AWARE EXERCISER DEVICE PLACEMENT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17930506 titled 'WORKLOAD AWARE EXERCISER DEVICE PLACEMENT

Simplified Explanation

The abstract of the patent application describes a method for incorporating exerciser devices into the design of an integrated circuit to optimize power consumption.

• Obtaining a design of an integrated circuit
• Creating a dynamic power blockage map for the integrated circuit
• Updating the integrated circuit design by placing exercisers on the integrated circuit based on the power blockage map
• Outputting the updated integrated circuit design if it complies with design constraints

Potential Applications

The technology described in this patent application could be applied in the development of more efficient and power-conscious integrated circuits for various electronic devices such as smartphones, laptops, and IoT devices.

Problems Solved

This technology addresses the challenge of optimizing power consumption in integrated circuits, which is crucial for extending battery life and improving overall performance in electronic devices.

Benefits

The incorporation of exerciser devices in the design process helps to identify and mitigate power blockages in integrated circuits, leading to more efficient and reliable electronic devices.

Potential Commercial Applications

Optimizing Power Consumption in Integrated Circuits: Enhancing Electronic Device Performance and Battery Life

Original Abstract Submitted

Embodiments include exerciser device placement in the development of an integrated circuit. Aspects of the invention include obtaining a design of an integrated circuit and creating a dynamic power blockage map for the integrated circuit. Aspects also include updating the integrated circuit design by placing one or more exercisers on the integrated circuit, wherein a location of the one or more exercisers on the integrated circuit is based on at least in part on the dynamic power blockage map. Based on a determination that the updated integrated circuit design complies with one or more design constraints, aspects further include outputting the updated integrated circuit design.