17903578. CALIBRATION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
CALIBRATION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
Organization Name
Inventor(s)
Jaehyeok Baek of Suwon-si (KR)
CALIBRATION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17903578 titled 'CALIBRATION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
Simplified Explanation
The patent application describes a calibration circuit that includes various units connected to power supply nodes. It also includes code generators that compare voltages with a reference voltage and generate corresponding codes.
- The calibration circuit includes pull-up and pull-down units connected to power supply nodes.
- The first code generator compares the voltage of a pad with a reference voltage and generates a first code.
- The second code generator compares the voltage of a first intermediate node with the reference voltage and outputs the second code to the pull-down units.
- The third code generator compares the voltage of a second intermediate node with the reference voltage and generates a third code.
Potential Applications
- This calibration circuit can be used in various electronic devices that require accurate voltage measurements.
- It can be applied in sensor systems, data acquisition systems, or any other application where precise voltage comparisons are necessary.
Problems Solved
- The calibration circuit solves the problem of accurately comparing voltages with a reference voltage.
- It ensures that the generated codes are reliable and can be used for calibration purposes.
Benefits
- The circuit provides a precise and reliable method for voltage comparison.
- It allows for accurate calibration of electronic devices.
- The use of multiple code generators enhances the accuracy and reliability of the calibration process.
Original Abstract Submitted
A calibration circuit includes a first, second and third pull-up units each connected to a first power supply node, and first and second pull-down units each connected to a second power supply node. A first code generator is configured to generate a first code by comparing a voltage of a pad at which the first pull-up unit is connected to an external resistor with a reference voltage, and a second code generator is configured to generate a second code by comparing a voltage of a first intermediate node with the reference voltage and output the second code to the first and second pull-down units. A third code generator is configured to generate a third code by comparing a voltage of a second intermediate node between the second pull-down unit and the third pull-up unit with the reference voltage.
