17902111. MULTI BRIDGE CHANNEL FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
MULTI BRIDGE CHANNEL FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
Kyung-Eun Byun of Seongnam-si (KR)
MULTI BRIDGE CHANNEL FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17902111 titled 'MULTI BRIDGE CHANNEL FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The abstract describes a multi bridge channel field effect transistor that includes various components such as a substrate, source/drain patterns, channel layers, graphene barrier, gate insulating layer, and gate electrode.
- The transistor includes a substrate, which serves as the base for all other components.
- There are two source/drain patterns, one placed apart from the other in a specific direction on the substrate.
- The first and second channel layers are located between the source/drain patterns, allowing for the flow of current.
- A graphene barrier is present between the first channel layer and the first source/drain pattern, providing protection and enhancing performance.
- The gate insulating layer surrounds the first channel layer, preventing leakage of current.
- The gate electrode surrounds the first channel layer, with the gate insulating layer acting as a barrier between them.
Potential applications of this technology:
- Integrated circuits
- Electronics industry
- Communication devices
Problems solved by this technology:
- Improved performance and efficiency of transistors
- Enhanced protection against current leakage
- Better control over the flow of current
Benefits of this technology:
- Higher performance and efficiency in electronic devices
- Increased reliability and durability
- Improved control and functionality of transistors
Original Abstract Submitted
A multi bridge channel field effect transistor includes a substrate, a first source/drain pattern on the substrate, a second source/drain pattern apart from the first source/drain pattern in a first direction on the substrate, a first channel layer and a second channel layer between the first source/drain pattern and the second source/drain pattern, a first graphene barrier between the first channel layer and the first source/drain pattern, a gate insulating layer surrounding the first channel layer, and a gate electrode surrounding the first channel layer with the gate insulating layer therebetween.
