17900151. LOW RESISTANCE INTERCONNECT FEATURES AND METHOD FOR MANUFACTURING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
LOW RESISTANCE INTERCONNECT FEATURES AND METHOD FOR MANUFACTURING THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chin-Lung Chung of Hsinchu (TW)
LOW RESISTANCE INTERCONNECT FEATURES AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17900151 titled 'LOW RESISTANCE INTERCONNECT FEATURES AND METHOD FOR MANUFACTURING THE SAME
Simplified Explanation
The patent application describes a method for manufacturing a semiconductor structure involving the use of two-dimensional materials.
- Form a first interconnect feature with a first conductive element in a dielectric feature.
- Place a first cap feature over the first conductive element, containing a two-dimensional material.
- Create a second dielectric feature with an opening exposing the first cap element.
- Apply a barrier layer over the second dielectric feature, leaving the first cap element exposed.
- Remove part of the first cap element exposed from the barrier layer.
- Form a second conductive element in the opening.
---
- Potential Applications
- Semiconductor manufacturing
- Electronics industry
- Nanotechnology research
- Problems Solved
- Enhancing conductivity in semiconductor structures
- Improving performance of electronic devices
- Utilizing two-dimensional materials effectively
- Benefits
- Increased efficiency in semiconductor manufacturing
- Enhanced electrical properties in devices
- Potential for smaller and more powerful electronic components
Original Abstract Submitted
A method for manufacturing a semiconductor structure includes forming a first interconnect feature in a first dielectric feature, the first interconnect feature including a first conductive element exposed from the first dielectric feature; forming a first cap feature over the first conductive element, the first cap feature including a first cap element which includes a two-dimensional material; forming a second dielectric feature with a first opening that exposes the first cap element; forming a barrier layer over the second dielectric feature while exposing the first cap element from the barrier layer; removing a portion of the first cap element exposed from the barrier layer; and forming a second conductive element in the first opening.
