17899623. INTERFACE DEVICE AND SIGNAL TRANSCEIVING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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INTERFACE DEVICE AND SIGNAL TRANSCEIVING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Bi-Yang Li of Hsinchu (TW)

Igor Elkanovich of Hsinchu (TW)

Hung-Yi Chang of Hsinchu (TW)

Shih-Cheng Kao of Hsinchu (TW)

INTERFACE DEVICE AND SIGNAL TRANSCEIVING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17899623 titled 'INTERFACE DEVICE AND SIGNAL TRANSCEIVING METHOD THEREOF

Simplified Explanation

The interface device described in the patent application includes a slave circuit and a master circuit. The slave circuit consists of a first programmable delay line, a first output clock generator, and a first phase detector. The first programmable delay line adjusts the delay amount based on an adjust signal and generates a delayed clock signal. The first output clock generator produces a second clock signal based on the delayed clock signal. The first phase detector determines the phase difference between the first clock signal and the second clock signal to generate phase lead or lag information, which is used to adjust the delay amount.

  • The interface device includes a slave circuit and a master circuit.
  • The slave circuit comprises a programmable delay line, an output clock generator, and a phase detector.
  • The delay line adjusts the delay amount based on an adjust signal.
  • The output clock generator generates a clock signal based on the delayed signal.
  • The phase detector determines the phase difference between two clock signals to generate phase lead or lag information.
  • The adjust signal is generated based on the phase lead or lag information.

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      1. Potential Applications
  • This technology can be used in communication systems to ensure accurate synchronization between devices.
  • It can be applied in data transmission systems to improve signal integrity and reduce errors.
      1. Problems Solved
  • The technology addresses the issue of phase misalignment between clock signals in electronic devices.
  • It helps in maintaining precise timing and synchronization in complex systems.
      1. Benefits
  • Improved reliability and performance of electronic devices.
  • Enhanced data transmission efficiency and accuracy.
  • Simplified design and implementation of communication systems.


Original Abstract Submitted

An interface device and a signal transceiving method thereof are provided. The interface device includes a slave circuit and a master circuit. The slave circuit is coupled to the master circuit and includes a first programmable delay line, a first output clock generator, and a first phase detector. The first programmable delay line provides a first adjusting delay amount according to a first adjust signal, and generates a first delayed clock signal by delaying a first clock signal according to the first adjusting delay amount. The first output clock generator generates a second clock signal according to the first delayed clock signal. The first phase detector detects a phase difference of the first clock signal and the second clock signal to generate first phase lead or lag information. The first adjust signal is generated according to the first phase lead or lag information.