17897869. ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC simplified abstract (Micron Technology, Inc.)

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

Organization Name

Micron Technology, Inc.

Inventor(s)

Kishore Kumar Muchherla of San Jose CA (US)

Niccolo' Righetti of Boise ID (US)

Sivagnanam Parthasarathy of Carlsbad CA (US)

Mustafa N. Kaynak of San Diego CA (US)

Mark A. Helm of Santa Cruz CA (US)

James Fitzpatrick of Laguna Niguel CA (US)

Ugo Russo of Boise ID (US)

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC - A simplified explanation of the abstract

This abstract first appeared for US patent application 17897869 titled 'ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

Simplified Explanation

The abstract describes a method for adjusting the code rate of a memory device based on the value of a memory endurance state metric.

• Determining the value of a memory endurance state metric associated with a segment of a memory device.
• Determining a target value of a code rate based on the memory endurance state metric.
• Adjusting the code rate of the memory device according to the target value.

• • Potential Applications:**
• Data storage systems
• Memory management in electronic devices
• Error correction in memory subsystems

• • Problems Solved:**
• Optimizing memory performance based on endurance state
• Improving error correction capabilities
• Enhancing overall system reliability

• • Benefits:**
• Increased memory device longevity
• Enhanced data integrity
• Improved system efficiency and performance

Original Abstract Submitted

A method includes determining, by a processing device, a value of a memory endurance state metric associated with a segment of a memory device in a memory sub-system; determining a target value of a code rate based on the value of the memory endurance state metric, and adjusting the code rate of the memory device according to the target value, wherein the code rate reflects a ratio of a number of memory units designated for storing host-originated data to a total number of memory units designated for storing the host-originated data and error correction metadata.