17897201. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Kuan-Ting Pan of Taipei City (TW)

Kuo-Cheng Chiang of Hsinchu County (TW)

Chih-Hao Wang of Hsinchu County (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17897201 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The semiconductor device described in the patent application includes a substrate, shallow trench isolation structure, epitaxial structures, semiconductor channel layers, gate metal layer, and gate spacer.

• The shallow trench isolation structure is placed on the substrate.
• Two epitaxial structures are positioned over the shallow trench isolation structure.
• The semiconductor channel layers connect the two epitaxial structures.
• The gate metal layer is located between the epitaxial structures and engages the semiconductor channel layers.
• The gate spacer is in contact with a sidewall of the gate metal layer.

• • Potential Applications:**

• Advanced semiconductor devices
• Integrated circuits
• Microprocessors

• • Problems Solved:**

• Improved performance and efficiency of semiconductor devices
• Enhanced integration of components
• Reduction of power consumption

• • Benefits:**

• Higher speed and performance
• Increased functionality
• Energy efficiency
• Enhanced reliability and durability

Original Abstract Submitted

A semiconductor device includes a substrate, a shallow trench isolation structure, two epitaxial structures, one or more semiconductor channel layers, a gate metal layer and a gate spacer. The shallow trench isolation structure is disposed over the substrate. The epitaxial structures are disposed over the shallow trench isolation structure. The one or more semiconductor channel layers connect the two epitaxial structures. The gate metal layer is located between the epitaxial structures and engages the one or more semiconductor channel layers. The gate spacer is in contact with a sidewall of the gate metal layer. From a cross-section view, a neck portion of the gate metal layer adjacent to and along the one or more semiconductor channel layers, and one side of the neck portion is retracted by a distance relative to the gate spacer, and the distance is greater than 0 and less than or equal to 2 nanometers.