17897151. SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Shahaji B. More of Hsinchu (TW)

Cheng-Wei Chang of Taipei (TW)

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17897151 titled 'SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

Simplified Explanation

The abstract describes a semiconductor device structure with specific features such as shallow trench isolation, fins, source/drain epitaxial features, dielectric features, and conductive features.

• The semiconductor device structure includes an NMOS region and a PMOS region on a substrate.
• A first shallow trench isolation (STI) is positioned across the NMOS and PMOS regions, with a slanted bottom from NMOS towards PMOS.
• Fins are present in both the PMOS and NMOS regions.
• Source/drain epitaxial features are located over the fins in both regions.
• A dielectric feature is placed between the source/drain epitaxial features, embedded in the first STI.
• A conductive feature is positioned over the source/drain epitaxial features and the dielectric feature.

• • Potential Applications:**

- This technology can be used in the manufacturing of advanced semiconductor devices for various electronic applications.

• • Problems Solved:**

- Provides improved isolation between different regions on the substrate. - Enhances the performance and efficiency of the semiconductor device.

• • Benefits:**

- Better control over the electrical characteristics of the device. - Increased reliability and functionality of the semiconductor device.

Original Abstract Submitted

A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a substrate comprising an NMOS region and a PMOS region abutting the NMOS region, a first shallow trench isolation (STI) disposed across the PMOS region and the NMOS region, the first STI has a first bottom being slanted from the NMOS region towards the PMOS region. The semiconductor device structure also includes a first fin disposed in the PMOS region, a first source/drain epitaxial feature disposed over the first fin, a second fin disposed in the NMOS region, a second source/drain epitaxial feature disposed over the second fin, a first dielectric feature disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, the first dielectric feature having a portion embedded in the first STI. The semiconductor device structure further includes a conductive feature disposed over the first and second source/drain epitaxial features and the first dielectric feature.