17896546. SEMICONDUCTOR DEVICE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Younggul Song of Hwaseong-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17896546 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The patent application describes a semiconductor device that includes multiple layers of gate electrodes stacked vertically on a substrate. These gate electrodes are divided into blocks by isolation structures. Each block contains channel structures that penetrate through the gate electrode layers.
- The semiconductor device includes multiple gate electrode layers stacked vertically on a substrate.
- Channel structures are present in each gate electrode layer and extend vertically.
- First isolation structures divide the gate electrode layers into blocks.
- Second isolation structures are present within each block.
- First isolation structures consist of a vertical insulating layer.
- Some second isolation structures consist of a vertical insulating layer and a conductive layer.
Potential applications of this technology:
- Integrated circuits
- Microprocessors
- Memory devices
- Power devices
Problems solved by this technology:
- Efficient use of space by stacking gate electrode layers vertically
- Improved isolation between gate electrode layers and blocks
- Enhanced performance and functionality of semiconductor devices
Benefits of this technology:
- Higher integration density
- Improved performance and functionality
- Reduced power consumption
- Enhanced reliability and durability
Original Abstract Submitted
A semiconductor device may include a plurality of gate electrode layers stacked in a first direction perpendicular to an upper surface of a substrate, a plurality of channel structures penetrating through the plurality of gate electrode layers and extending in the first direction, a plurality of first isolation structures extending in a second direction parallel to the upper surface of the substrate and dividing the plurality of gate electrode layers into a plurality of blocks, and a plurality of second isolation structures extending in the second direction within each of the plurality of blocks. Each of the plurality of first isolation structures may include only a first vertical insulating layer, and at least one of the plurality of second isolation structures may include a second vertical insulating layer and a conductive layer.
