17896506. MEMORY DEVICE AND MANUFACTURING METHOD AND TEST METHOD OF THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
MEMORY DEVICE AND MANUFACTURING METHOD AND TEST METHOD OF THE SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Min-Chiao Yeh of Taoyuan City (TW)
Chia-En Huang of Hsinchu County (TW)
Ji Kuan Lee of Taichung City (TW)
Yao-Jen Yang of Hsinchu County (TW)
MEMORY DEVICE AND MANUFACTURING METHOD AND TEST METHOD OF THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17896506 titled 'MEMORY DEVICE AND MANUFACTURING METHOD AND TEST METHOD OF THE SAME
Simplified Explanation
The abstract describes a method for identifying short-circuits or open-circuits in conductive loops in a memory device.
- Activating a first word line to connect a first bit line with a second bit line through transistors.
- Activating a second word line to connect a third bit line with a fourth bit line through transistors.
- Identifying short-circuits or open-circuits in the conductive loops formed by the connections.
Potential Applications
- Memory devices
- Circuit testing and debugging
Problems Solved
- Detecting faults in conductive loops
- Ensuring proper functioning of memory devices
Benefits
- Improved reliability of memory devices
- Efficient testing and debugging process
Original Abstract Submitted
A method is provided, including following operations: activating a first word line to couple a first bit line with a second bit line to form a first conductive loop through a first transistor having a first terminal coupled to the first bit line and a second transistor having a first terminal coupled to the second bit line, wherein second terminals of the first and second transistors are coupled together; activating a second word line to couple a third bit line with a fourth bit line to form a second conductive loop, wherein the first and second word lines are disposed below the first to fourth bit lines; and identifying that the first conductive loop, the second conductive loop, or the combinations thereof is short-circuited or open-circuited.
