17895988. TRIGGERING OF STRONGER WRITE PULSES IN A MEMORY DEVICE BASED ON PRIOR READ OPERATIONS simplified abstract (Micron Technology, Inc.)

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TRIGGERING OF STRONGER WRITE PULSES IN A MEMORY DEVICE BASED ON PRIOR READ OPERATIONS

Organization Name

Micron Technology, Inc.

Inventor(s)

Zhongyuan Lu of Boise ID (US)

Robert John Gleixner of San Jose CA (US)

TRIGGERING OF STRONGER WRITE PULSES IN A MEMORY DEVICE BASED ON PRIOR READ OPERATIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17895988 titled 'TRIGGERING OF STRONGER WRITE PULSES IN A MEMORY DEVICE BASED ON PRIOR READ OPERATIONS

Simplified Explanation

  • Systems, methods, and apparatus for selecting an enhanced write pulse for a write operation in a memory device.
  • Stronger reset pulses are triggered when there is an increased risk of memory cell threshold voltage degradation.
  • Memory cells read by a relatively higher number of read operations are recorded in a lookup table by a controller.
  • The controller determines if a reset on set write operation is to be performed for a new write operation.
  • The controller searches the lookup table to determine if the address for the target bits of the write operation is in the table.
  • If both conditions are satisfied, the magnitude of the write pulse is increased for programming the memory cells.

Potential Applications

This technology can be applied in various memory devices such as solid-state drives, flash memory, and other non-volatile memory technologies.

Problems Solved

1. Reduced risk of memory cell threshold voltage degradation. 2. Efficient programming of memory cells based on their usage history.

Benefits

1. Improved reliability and longevity of memory devices. 2. Enhanced performance in write operations. 3. Adaptive programming based on memory cell usage patterns.


Original Abstract Submitted

Systems, methods, and apparatus to select an enhanced write pulse for a write operation in a memory device. In one approach, stronger reset pulses are triggered when there is an increased risk of memory cell threshold voltage degradation. Memory cells read by a relatively higher number of read operations are recorded by a controller of a memory device by updating a lookup table with addresses of the memory cells read. For a new write operation, the controller determines if a reset on set write operation is to be performed. The controller also searches the lookup table to determine if an address for the target bits or codeword of the write operation are in the lookup table. If both conditions are satisfied, then the magnitude of the write pulse is increased for programming the memory cells.