17894084. SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Zi-Jheng Liu of Taoyuan City (TW)

Ting-Yang Yu of Hsinchu (TW)

Ming-Tan Lee of Kaohsiung City (TW)

Hung-Jui Kuo of Hsinchu City (TW)

SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17894084 titled 'SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The semiconductor package described in the patent application includes a first die, a second die, and a redistribution layer structure. The first die and the second die are positioned next to each other, and the redistribution layer structure is placed over them, electrically connecting them. The redistribution layer structure consists of multiple vias and lines stacked alternately and connected to each other, embedded by polymer layers. The first vias of the vias have an elliptical-like shape when viewed from the top.

  • The semiconductor package includes a first die and a second die positioned laterally.
  • The redistribution layer structure is placed over the first die and the second die, electrically connecting them.
  • The redistribution layer structure consists of vias and lines stacked alternately and embedded by polymer layers.
  • The first vias of the structure have an elliptical-like shape when viewed from the top.

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      1. Potential Applications
  • This technology can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can also be applied in automotive electronics, medical devices, and industrial equipment.
      1. Problems Solved
  • Provides a compact and efficient way to connect multiple dies in a semiconductor package.
  • Ensures reliable electrical connections between the dies.
  • Reduces the overall size of the semiconductor package.
      1. Benefits
  • Improved performance and reliability of electronic devices.
  • Cost-effective manufacturing process.
  • Enables higher integration of components in a smaller space.


Original Abstract Submitted

A semiconductor package includes a first die, a second die and a redistribution layer structure. The first die and the second die are disposed laterally. The redistribution layer structure is disposed over and electrically connected to the first die and the second die, wherein the redistribution layer structure includes a plurality of vias and a plurality of lines stacked alternately and electrically connected to each other and embedded by a plurality of polymer layers, and wherein from a top view, first vias of the plurality of vias overlapping with the first die or the second die have an elliptical-like shape.