17892415. SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR DEVICE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Juyoun Kim of Suwon-si (KR)

Sangjung Kang of Suwon-si (KR)

Jinwoo Kim of Hwaseong-si (KR)

Yoori Sung of Hwaseong-si (KR)

SEMICONDUCTOR DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17892415 titled 'SEMICONDUCTOR DEVICE

Simplified Explanation

The patent application describes a semiconductor device that includes PMOSFET and NMOSFET regions, with first and second transistors on these regions. The first transistor has a first gate dielectric layer, a first lower metal pattern, a second lower metal pattern, and a first intermediate pattern. The second transistor has a second gate dielectric layer, a third lower metal pattern, and a second intermediate pattern. The first and second intermediate patterns contain lanthanum, while the first to third lower metal patterns contain a metal nitride. The first lower metal pattern is thicker than the third lower metal pattern.

  • The semiconductor device includes PMOSFET and NMOSFET regions.
  • The first transistor has a first gate dielectric layer, a first lower metal pattern, a second lower metal pattern, and a first intermediate pattern.
  • The second transistor has a second gate dielectric layer, a third lower metal pattern, and a second intermediate pattern.
  • The first and second intermediate patterns contain lanthanum.
  • The first to third lower metal patterns contain a metal nitride.
  • The first lower metal pattern is thicker than the third lower metal pattern.

Potential Applications

  • This semiconductor device can be used in various electronic devices, such as smartphones, computers, and tablets.
  • It can be applied in the manufacturing of integrated circuits and microprocessors.

Problems Solved

  • The semiconductor device addresses the need for efficient and reliable transistors for different applications.
  • It solves the problem of optimizing the performance of PMOSFET and NMOSFET regions.

Benefits

  • The inclusion of lanthanum in the intermediate patterns enhances the performance and stability of the transistors.
  • The use of metal nitride in the lower metal patterns improves conductivity and durability.
  • The variation in thickness between the first and third lower metal patterns allows for better control of electrical properties.


Original Abstract Submitted

A semiconductor device includes a substrate including PMOSFET and NMOSFET regions; and first/second transistors on the PMOSFET/NMOSFET regions, respectively, wherein the first transistor includes a first gate dielectric layer on the substrate; a first lower metal pattern on the first gate dielectric layer; a second lower metal pattern on the first lower metal pattern; and a first intermediate pattern between the first and second lower metal patterns, the second transistor includes a second gate dielectric layer on the substrate; a third lower metal pattern on the second gate dielectric layer; and a second intermediate pattern between the second gate dielectric layer and the third lower metal pattern, the first and second intermediate patterns each include lanthanum, the first to third lower metal patterns each include a metal nitride, and a thickness of the first lower metal pattern is greater than a thickness of the third lower metal pattern.

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