17887320. METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Wei-Ting Chang of Hsinchu City (TW)
Kuo-Ju Chen of Taichung City (TW)
Tien-Shun Chang of New Taipei City (TW)
Su-Hao Liu of Chiayi County (TW)
Huicheng Chang of Tainan City (TW)
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17887320 titled 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Simplified Explanation
The method described in the patent application involves a process for forming a metal gate structure in a semiconductor device. Here are the key points of the innovation:
- Forming a fin structure over a substrate
- Depositing a dummy gate layer over the substrate and the fin structure
- Depositing a hard mask stack over the dummy gate layer
- Depositing a photoresist bottom layer with a first stress
- Performing an implantation process to the photoresist bottom layer to change the stress to a second stress closer to 0
- Patterning the implanted bottom layer
- Patterning the hard mask stack and the dummy gate layer using the patterned implanted bottom layer as an etch mask
- Replacing the dummy gate structure with a metal gate structure
Potential applications of this technology:
- Semiconductor manufacturing
- Integrated circuit fabrication
- Advanced electronic devices
Problems solved by this technology:
- Improving the performance and efficiency of semiconductor devices
- Enhancing the reliability and durability of electronic components
Benefits of this technology:
- Increased speed and functionality of electronic devices
- Reduced power consumption
- Enhanced overall performance and longevity of semiconductor products
Original Abstract Submitted
A method includes forming a fin structure over a substrate; depositing a dummy gate layer over the substrate and the fin structure; depositing a hard mask stack over the dummy gate layer; depositing a photoresist bottom layer over the hard mask stack, wherein the photoresist bottom layer has a first stress; performing an implantation process to the photoresist bottom layer to form an implanted bottom layer with a second stress closer to 0 than the first stress; patterning the implanted bottom layer; patterning the hard mask stack and the dummy gate layer by using the patterned implanted bottom layer as an etch mask to form a dummy gate structure over the fin structure; and replacing the dummy gate structure with a metal gate structure.
