17887194. DEEP TRENCH CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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DEEP TRENCH CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Fu-Chiang Kuo of Hsinchu City (TW)

Yu-Han Chen of Yilan County (TW)

Cheng-Wei Lo of Hsinchu City (TW)

DEEP TRENCH CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17887194 titled 'DEEP TRENCH CAPACITOR STRUCTURE AND METHOD FOR FORMING THE SAME

Simplified Explanation

The method described in the patent application involves forming deep trenches of two different types in a substrate, followed by creating a capacitor structure within these trenches and forming a metal via over the capacitor structure.

  • The method includes forming first-type deep trenches and second-type deep trenches in a substrate.
  • The first-type deep trenches have a first lengthwise direction along a first direction, while the second-type deep trenches have a second lengthwise direction along a second direction.
  • A capacitor structure is then formed over the substrate and within the deep trenches.
  • The capacitor structure consists of a first metallic electrode layer, a node dielectric layer, and a second metallic electrode layer.
  • Finally, a first metal via is formed over the capacitor structure, in contact with the second metallic electrode layer, with a length greater than the width from a top view.

Potential applications of this technology:

  • Semiconductor manufacturing
  • Memory devices
  • Integrated circuits

Problems solved by this technology:

  • Improving capacitor structures in semiconductor devices
  • Enhancing performance and efficiency of integrated circuits

Benefits of this technology:

  • Increased capacitance in a smaller footprint
  • Improved functionality and reliability of semiconductor devices
  • Enhanced performance of memory devices and integrated circuits


Original Abstract Submitted

A method includes forming first-type deep trenches and second-type deep trenches in a substrate, in which the first-type deep trenches have a first lengthwise direction along a first direction and the second-type deep trenches have a second lengthwise direction along a second direction; forming a capacitor structure over the substrate and in the first-type deep trenches and the second-type deep trenches, in which the capacitor structure includes a first metallic electrode layer, a node dielectric layer over the first metallic electrode layer, and a second metallic electrode layer over the node dielectric layer; and forming a first metal via over the capacitor structure and in contact with the second metallic electrode layer of the capacitor structure, in which a length of the first metal via is greater than a width of the first metal via from a top view.