17881039. MEMORY DEVICE INCLUDING VERTICAL CHANNEL STRUCTURE simplified abstract (Samsung Electronics Co., Ltd.)

MEMORY DEVICE INCLUDING VERTICAL CHANNEL STRUCTURE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Yongsung Cho of Hwaseong-si (KR)

Minjae Seo of Hwaseong-si (KR)

Kyoman Kang of Gunpo-si (KR)

Byungsoo Kim of Anyang-si (KR)

MEMORY DEVICE INCLUDING VERTICAL CHANNEL STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17881039 titled 'MEMORY DEVICE INCLUDING VERTICAL CHANNEL STRUCTURE

Simplified Explanation

The patent application describes a memory device with a vertical channel structure. It includes a memory cell array with multiple memory cells and string selection lines, a negative charge pump to generate a negative bias voltage for the string selection lines, and a control logic circuit.

• The memory device has a vertical channel structure, which allows for efficient memory cell operation.
• The device includes a memory cell array with multiple memory cells and string selection lines, which help in accessing and controlling the memory cells.
• A negative charge pump is used to generate a negative bias voltage, which is applied to at least one of the string selection lines.
• A control logic circuit is present to apply a prepulse voltage to unselected string selection lines for a specific period, followed by the application of the bias voltage to perform a read operation on the selected memory cell.

Potential applications of this technology:

• This memory device can be used in various electronic devices such as smartphones, tablets, and computers.
• It can be utilized in data storage systems, improving their performance and efficiency.
• The technology can be integrated into artificial intelligence systems, enabling faster data processing and analysis.

Problems solved by this technology:

• The vertical channel structure of the memory device allows for better control and operation of memory cells, reducing data access and retrieval time.
• The use of a negative charge pump and specific voltage application techniques improves the read operation efficiency of the memory cells.
• The technology addresses the need for faster and more reliable memory devices in various electronic applications.

Benefits of this technology:

• The memory device with a vertical channel structure provides improved performance and efficiency compared to traditional memory devices.
• The use of a negative charge pump and specific voltage application techniques enhances the read operation speed and accuracy.
• The technology enables faster data processing and analysis, contributing to overall system performance.

Original Abstract Submitted

Provided is a memory device with a vertical channel structure. The memory device includes a memory cell array including a plurality of memory cells and a plurality of string selection lines, a negative charge pump configured to generate a bias voltage of a negative level, to be applied to at least one of the plurality of string selection lines, and a control logic circuit configured to apply, for a first period, a prepulse voltage to at least one unselected string selection line among the plurality of string selection lines excluding a selected string selection line to which a memory cell selected from among the plurality of memory cells is connected and thereafter apply the bias voltage to the at least one unselected string selection line so as to perform a read operation on the selected memory cell.