17879107. SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
Organization Name
Inventor(s)
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17879107 titled 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
Simplified Explanation
The abstract describes a semiconductor device and a semiconductor memory device that includes the same. The device consists of a first electrode, a second electrode, a ferroelectric layer, an anti-ferroelectric layer, and an insertion layer.
- The semiconductor device includes a first electrode and a second electrode.
- A ferroelectric layer is positioned between the first and second electrodes.
- An anti-ferroelectric layer is in contact with the ferroelectric layer.
- An insertion layer is spaced apart from the ferroelectric layer and in contact with the anti-ferroelectric layer.
Potential Applications:
- This technology can be used in semiconductor memory devices.
- It can be applied in various electronic devices that require memory storage.
Problems Solved:
- The disclosed device addresses the need for a reliable and efficient semiconductor memory device.
- It solves the problem of data loss or corruption in memory storage.
Benefits:
- The device provides improved reliability and stability in memory storage.
- It offers high-speed read and write operations.
- The technology enables high-density memory storage.
- It has low power consumption, making it energy-efficient.
Original Abstract Submitted
Disclosed are a semiconductor device and a semiconductor memory device including the same. A semiconductor device may include a first electrode, a second electrode on the first electrode, a ferroelectric layer between the first electrode and the second electrode, an anti-ferroelectric layer in contact with the ferroelectric layer, and an insertion layer spaced apart from the ferroelectric layer and in contact with the anti-ferroelectric layer.
