17878758. PACKAGE WITH A SUBSTRATE COMPRISING EMBEDDED STACKED TRENCH CAPACITOR DEVICES simplified abstract (QUALCOMM Incorporated)

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PACKAGE WITH A SUBSTRATE COMPRISING EMBEDDED STACKED TRENCH CAPACITOR DEVICES

Organization Name

QUALCOMM Incorporated

Inventor(s)

Ryan Lane of San Diego CA (US)

Charles David Paynter of Encinitas CA (US)

Durodami Lisk of San Diego CA (US)

Darko Popovic of San Diego CA (US)

Yue Li of San Diego CA (US)

Shree Krishna Pandey of San Diego CA (US)

PACKAGE WITH A SUBSTRATE COMPRISING EMBEDDED STACKED TRENCH CAPACITOR DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17878758 titled 'PACKAGE WITH A SUBSTRATE COMPRISING EMBEDDED STACKED TRENCH CAPACITOR DEVICES

Simplified Explanation

The abstract describes a package that consists of a substrate and an integrated device. The substrate has a core layer with two surfaces, a plurality of core interconnects, and at least one first dielectric layer coupled to the first surface. It also includes a first plurality of interconnects located in the first dielectric layer, at least one second dielectric layer coupled to the second surface, a second plurality of interconnects located in the second dielectric layer, and a capacitor structure located in the core layer. The capacitor structure includes a first trench capacitor device with a front side and a back side, and a second trench capacitor device coupled to the first trench capacitor device, which has a front side and a back side.

  • The package includes a substrate with a core layer and multiple interconnects.
  • It has at least one dielectric layer coupled to the core layer, which contains additional interconnects.
  • The core layer also houses a capacitor structure with two trench capacitor devices.
  • The first trench capacitor device is connected to the second trench capacitor device.

Potential applications of this technology:

  • Integrated circuits and electronic devices can benefit from the improved interconnects and capacitor structure provided by this package.
  • The package can be used in various electronic systems, such as computers, smartphones, and IoT devices.

Problems solved by this technology:

  • The package addresses the need for efficient interconnects and capacitor structures in electronic devices.
  • It provides a compact and integrated solution for interconnectivity and capacitance requirements.

Benefits of this technology:

  • The package offers improved performance and reliability due to its advanced interconnects and capacitor structure.
  • It enables miniaturization and integration of electronic devices, leading to space-saving and cost-effective solutions.
  • The package enhances the overall functionality and efficiency of electronic systems.


Original Abstract Submitted

A package comprising a substrate and an integrated device. The substrate includes a core layer comprising a first surface and a second surface; a plurality of core interconnects located in the core layer; at least one first dielectric layer coupled to the first surface of the core layer; a first plurality of interconnects located in the at least one first dielectric layer; at least one second dielectric layer coupled to the second surface of the core layer; a second plurality of interconnects located in the at least one second dielectric layer; and a capacitor structure located in the core layer. The capacitor structure includes a first trench capacitor device comprising a first front side and a first back side; and a second trench capacitor device coupled to the first trench capacitor device, where the second trench capacitor device comprises a second front side and a second back side.

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