17877156. PACKAGE COMPRISING INTEGRATED DEVICES simplified abstract (QUALCOMM Incorporated)

PACKAGE COMPRISING INTEGRATED DEVICES

Organization Name

QUALCOMM Incorporated

Inventor(s)

Mahalingam Nagarajan of San Diego CA (US)

Vaishnav Srinivas of Oceanside CA (US)

Nitin Juneja of Fremont CA (US)

Christophe Avoinne of San Diego CA (US)

Xavier Loic Leloup of San Diego CA (US)

Michael David Jager of Camberley (GB)

Charles David Paynter of Encinitas CA (US)

Joon Young Park of San Diego CA (US)

PACKAGE COMPRISING INTEGRATED DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17877156 titled 'PACKAGE COMPRISING INTEGRATED DEVICES

Simplified Explanation

The abstract describes a package that includes a substrate with dielectric layers and interconnects, as well as two integrated devices connected to the substrate through solder interconnects. The first integrated device is electrically coupled to the second integrated device through an electrical path consisting of inner solder interconnects, interconnects, and solder interconnects.

• The package includes a substrate with dielectric layers and interconnects.
• Two integrated devices are connected to the substrate through solder interconnects.
• The first integrated device is electrically coupled to the second integrated device through an electrical path.
• The electrical path consists of inner solder interconnects, interconnects, and solder interconnects.

Potential applications of this technology:

• Electronics packaging and assembly
• Integrated circuit manufacturing
• Semiconductor devices

Problems solved by this technology:

• Efficient electrical coupling between integrated devices
• Improved interconnect reliability and performance
• Enhanced integration and miniaturization of electronic components

Benefits of this technology:

• Higher electrical connectivity and signal transmission between integrated devices
• Increased reliability and performance of interconnects
• Improved overall functionality and efficiency of electronic systems

Original Abstract Submitted

A package comprising a substrate comprising at least one dielectric layer and a plurality of interconnects; a first integrated device coupled to the substrate through a first plurality of solder interconnects, wherein the first plurality of solder interconnects includes a first plurality of inner solder interconnects and a first plurality of perimeter solder interconnects; and a second integrated device coupled to the substrate through a second plurality of solder interconnects. The first integrated device is configured to be electrically coupled to the second integrated device through an electrical path. The electrical path comprises an inner solder interconnect from the first plurality of inner solder interconnects, at least one interconnect from the plurality of interconnects, and a solder interconnect from the second plurality of solder interconnects.