SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 17875975 titled 'SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME

Simplified Explanation

The abstract describes a method for forming a semiconductor device structure. The method involves several steps such as providing a substrate, forming a nanostructure stack over the substrate, and forming a gate stack over the nanostructure stack and the substrate. The method also includes removing the first nanostructure to create a gap, forming a spacer layer in the gap, and partially removing the nanostructure stack to create a trench. Finally, a source/drain structure is formed in the trench.

The method involves providing a substrate and forming a nanostructure stack over it.
A gate stack is formed over the nanostructure stack and the substrate.
The first nanostructure is removed to create a gap between the substrate and the second nanostructure.
A first spacer layer is formed in the gap, and a gate spacer is formed over the sidewall of the gate stack.
The nanostructure stack is partially removed to create a trench in the areas not covered by the gate stack and gate spacer.
A source/drain structure is formed in the trench and over the first spacer layer.

Potential applications of this technology:

This method can be used in the fabrication of semiconductor devices, such as transistors, integrated circuits, and memory devices.
It can be applied in the manufacturing of advanced electronic devices with improved performance and functionality.

Problems solved by this technology:

The method provides a way to form a semiconductor device structure with precise control over the dimensions and placement of the nanostructures and gate stack.
It allows for the formation of a source/drain structure in the trench, which enhances the performance and efficiency of the semiconductor device.

Benefits of this technology:

The method enables the fabrication of semiconductor devices with improved performance, such as faster switching speeds and lower power consumption.
It offers a more efficient and reliable process for creating nanostructures and gate stacks in semiconductor devices.
The precise control over the dimensions and placement of the nanostructures allows for better integration and miniaturization of electronic components.

Original Abstract Submitted

A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes forming a nanostructure stack over the substrate. The method includes forming a gate stack over the nanostructure stack and the substrate. The method includes removing the first nanostructure forming a first gap between the substrate and the second nanostructure. The method includes forming a first spacer layer in the first gap and a gate spacer over a sidewall of the gate stack. The method includes partially removing the nanostructure stack, which is not covered by the gate stack and the gate spacer, to form a first trench in the nanostructure stack. The method includes forming a source/drain structure in the first trench and over the first spacer layer.

17875975. SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

Contents

SEMICONDUCTOR DEVICE STRUCTURE WITH NANOSTRUCTURE AND METHOD FOR FORMING THE SAME

Organization Name

Inventor(s)