17873686. READ ASSIST CIRCUIT FOR MEMORY DEVICE AND OPERATION METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

READ ASSIST CIRCUIT FOR MEMORY DEVICE AND OPERATION METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Yorinobu Fujino of Kanagawa (JP)

READ ASSIST CIRCUIT FOR MEMORY DEVICE AND OPERATION METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17873686 titled 'READ ASSIST CIRCUIT FOR MEMORY DEVICE AND OPERATION METHOD THEREOF

Abstract

A memory device is provided with a first word line coupled to a first memory cell, a second word line coupled to a second memory cell, and a read assist circuit coupled between the first and second word lines. In a first time period, the read assist circuit adjusts the voltage level of the first word line to a first voltage and the voltage level of the second word line to a second voltage in response to a first control signal. The first voltage is smaller than a first supply voltage, and the second voltage is greater than a second supply voltage smaller than the first supply voltage.

Patent/Innovation Explanation

• The memory device includes a read assist circuit that adjusts the voltage levels of the word lines in response to a control signal.
• The first word line is connected to a first memory cell, and the second word line is connected to a second memory cell.
• In the first time period, the read assist circuit adjusts the voltage level of the first word line to a lower voltage (first voltage) and the voltage level of the second word line to a higher voltage (second voltage).
• The first voltage is smaller than the first supply voltage, and the second voltage is greater than a second supply voltage, which is smaller than the first supply voltage.

Potential Applications

• Memory devices using this technology can be used in various electronic devices, such as computers, smartphones, and tablets.
• This technology can be applied in data storage systems, allowing for efficient and reliable memory operations.
• It can be used in embedded systems, where memory performance and power consumption are critical factors.

Problems Solved

• This technology solves the problem of voltage level adjustment in memory devices.
• It addresses the need for adjusting the voltage levels of word lines to optimize memory cell performance.
• The read assist circuit helps in achieving accurate voltage levels for improved memory operations.

Benefits

• The memory device with this technology offers improved performance and reliability.
• It allows for efficient reading and writing of data in memory cells.
• The voltage level adjustment provided by the read assist circuit enhances the overall functionality of the memory device.

Original Abstract Submitted

A memory device is provided, including a first word line coupled to a first memory cell, a second word line coupled to a second memory cell, and a read assist circuit coupled between the first and second word lines, and in a first time period configured, in response to a first control signal, to adjust a voltage level of the first word line to a first voltage and to adjust a voltage level of the second word line to a second voltage. In some embodiments, the first voltage is smaller than a first supply voltage, and the second voltage is greater than a second supply voltage smaller than the first supply voltage.