17864736. SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Organization Name
Inventor(s)
Sunghye Cho of Hwaseong-si (KR)
Byeonggyu Park of Hwaseong-si (KR)
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17864736 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
Simplified Explanation
The patent application describes a semiconductor memory device that includes a memory cell array, a row hammer management circuit, and a refresh control circuit.
- The row hammer management circuit captures row addresses and first active commands randomly selected from external memory controller during a reference time interval.
- The row hammer management circuit selects at least one row address as a hammer address based on the access counts of the corresponding active command.
- The refresh control circuit receives the hammer address and performs a hammer refresh operation on adjacent memory cell rows.
Potential Applications
- This technology can be used in various electronic devices that require efficient memory management, such as smartphones, tablets, and computers.
- It can be particularly useful in devices that heavily rely on memory-intensive applications, such as gaming consoles and data centers.
Problems Solved
- Row hammer is a phenomenon where repeated access to a specific memory row can cause bit flips in adjacent rows, leading to data corruption and system instability.
- This technology solves the problem of row hammer by identifying the hammer address and performing a refresh operation on the adjacent memory cell rows, preventing data corruption.
Benefits
- The semiconductor memory device with this technology provides improved reliability and stability by preventing row hammer-induced data corruption.
- It enhances the overall performance of memory-intensive applications by efficiently managing memory access and reducing the impact of row hammer.
- The technology can be easily implemented in existing memory devices, making it cost-effective and scalable.
Original Abstract Submitted
A semiconductor memory device includes a memory cell array including a plurality of memory cell rows, a row hammer management circuit, and a refresh control circuit. The row hammer management circuit captures row addresses accompanied by first active commands randomly selected from active commands, each of which has a first selection probability that is uniform, from an external memory controller during a reference time interval, and selects at least one row address from among the captured row addresses as a hammer address a number of times proportional to access counts of an active command corresponding to the at least one row address during the reference time interval. The refresh control circuit receives the hammer address and performs a hammer refresh operation on one or more victim memory cell rows which are physically adjacent to a memory cell row corresponding to the hammer address.
