17858844. FLIP-FLOP WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHODS OF MANUFACTURING SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
FLIP-FLOP WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHODS OF MANUFACTURING SAME
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Hui-Zhong Zhuang of Hsinchu (TW)
Yung-Chen Chien of Hsinchu (TW)
Jerry Chang Jui Kao of Hsinchu (TW)
Xiangdong Chen of Hsinchu (TW)
FLIP-FLOP WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHODS OF MANUFACTURING SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17858844 titled 'FLIP-FLOP WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHODS OF MANUFACTURING SAME
Simplified Explanation
The patent application describes a semiconductor device that functions as a D flip-flop, which includes a primary latch, a secondary latch, and a clock buffer. The transistors in the device are grouped based on their threshold voltage.
- The semiconductor device functions as a D flip-flop with a primary latch, secondary latch, and clock buffer.
- The transistors in the device are grouped into three categories based on their threshold voltage: standard, low, and high.
- The transistors in the first or second NS inverter have a low threshold voltage.
- The device can also function as a scan-insertion type of D flip-flop with a multiplexer, where the transistors in the multiplexer have a low threshold voltage.
Potential applications of this technology:
- Integrated circuits and microprocessors
- Digital logic circuits
- Memory devices
Problems solved by this technology:
- Improved performance and reliability of D flip-flops
- Efficient use of transistors with different threshold voltages
- Enhanced functionality and flexibility in circuit design
Benefits of this technology:
- Higher speed and lower power consumption in semiconductor devices
- Improved stability and robustness of D flip-flops
- Simplified circuit design and layout
Original Abstract Submitted
A semiconductor device includes: a cell region including active regions where components of transistors are formed; the cell region are arranged to function as a D flip-flop that includes a primary latch (having a first sleepy inverter and a first non-sleepy (NS) inverter), a secondary latch (having a second sleepy inverter and a second NS inverter), and a clock buffer (having third and fourth NS inverters). The transistors are grouped: a first group has a standard threshold voltage (Vt_std); a second group has a low threshold voltage (Vt_low); and an optional third group has a high threshold voltage (Vt_high). The transistors which comprise the first or second NS inverter have Vt_low. Alternatively, the transistors of the cell region are further arranged to function as a scan-insertion type of D flip-flop (SDFQ) that further includes a multiplexer; and the transistors of the multiplexer have Vt_low.
