17849725. SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Li-Zhen Yu of New Taipei City (TW)

Huan-Chieh Su of Changhua County (TW)

Lin-Yu Huang of Hsinchu (TW)

Chih-Hao Wang of Hsinchu County (TW)

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 17849725 titled 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation

The patent application describes a semiconductor device that consists of multiple stacks of nanostructures, a gate structure, source and drain structures, and fin structures.

• The device includes multiple stacks of nanostructures that are stacked on top of each other.
• A gate structure wraps around the nanostructures and extends between the stacks.
• Source and drain structures are present in the device.
• The device also includes fin structures that are placed on top of the stacks.
• The first surface of the gate structure between the stacks is aligned with the first surfaces of the fin structures facing the nanostructures or between the first surfaces of the fin structures and the nanostructures.

Potential applications of this technology:

• This semiconductor device can be used in various electronic devices such as smartphones, tablets, and computers.
• It can be utilized in the manufacturing of high-performance processors and memory chips.

Problems solved by this technology:

• The device addresses the need for improved performance and efficiency in semiconductor devices.
• It solves the challenge of integrating multiple nanostructures and fin structures in a compact and efficient manner.

Benefits of this technology:

• The device offers enhanced performance and efficiency compared to traditional semiconductor devices.
• It allows for the integration of multiple nanostructures and fin structures, enabling higher density and functionality.
• The coplanar alignment of the gate structure and fin structures improves the overall performance and reliability of the device.

Original Abstract Submitted

A semiconductor device includes a plurality of stacks that each includes a plurality of nanostructures stacked over each other, a gate structure wrapping around the nanostructures and extending between the stacks, source and drain structures, and a plurality of fin structures respectively disposed on the stacks. A first surface of the gate structure between the stacks is substantially coplanar with first surfaces of the fin structures facing to the nanostructures or between the first surfaces of the fin structures and the nanostructures.