17848630. HYPER DENSITY PACKAGE SUBSTRATE AND MEMORY COUPLED TO A MODIFIED SEMI-ADDITIVE PROCESS BOARD simplified abstract (Intel Corporation)

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HYPER DENSITY PACKAGE SUBSTRATE AND MEMORY COUPLED TO A MODIFIED SEMI-ADDITIVE PROCESS BOARD

Organization Name

Intel Corporation

Inventor(s)

Kavitha Nagarajan of Bangalore (IN)

Eng Huat Goh of Ayer Itam (MY)

Min Suet Lim of Gelugor (MY)

Telesphor Kamgaing of Chandler AZ (US)

Chee Kheong Yoon of Bayan Lepas (MY)

Jooi Wah Wong of Bukit Mertajam (MY)

Chu Aun Lim of Hillsboro OR (US)

HYPER DENSITY PACKAGE SUBSTRATE AND MEMORY COUPLED TO A MODIFIED SEMI-ADDITIVE PROCESS BOARD - A simplified explanation of the abstract

This abstract first appeared for US patent application 17848630 titled 'HYPER DENSITY PACKAGE SUBSTRATE AND MEMORY COUPLED TO A MODIFIED SEMI-ADDITIVE PROCESS BOARD

Simplified Explanation

The patent application relates to a system for packaging electronic components, specifically a die complex with a base die, a HDP substrate, and an mSAP board. The HDP substrate acts as a pitch translator between the base die and the mSAP board, allowing for a reduced overall package height.

  • The system includes a die complex with a base die, a HDP substrate, and an mSAP board.
  • The HDP substrate has a small trace width and spacing, enabling it to act as a pitch translator between the base die and the mSAP board.
  • The HDP substrate can translate between a 110 μm pitch and a 210 μm pitch.
  • One or more DRAM modules can be coupled with the mSAP board.
  • The configuration of the system results in a reduced overall package height.

Potential Applications

  • This packaging system can be used in various electronic devices, such as smartphones, tablets, and laptops.
  • It can also be applied in other industries that require compact and efficient packaging of electronic components.

Problems Solved

  • The system solves the problem of achieving a reduced overall package height while maintaining the necessary connections between the base die and the mSAP board.
  • It also solves the problem of translating between different pitch sizes, allowing for compatibility between the base die and the mSAP board.

Benefits

  • The reduced overall package height allows for more compact and slim electronic devices.
  • The pitch translation capability enables compatibility between different components with varying pitch sizes.
  • The system provides efficient and reliable connections between the base die, HDP substrate, and mSAP board.


Original Abstract Submitted

Embodiments herein relate to systems, apparatuses, techniques or processes for packages that include a die complex with a base die that is coupled with a HDP substrate that in turn is coupled with an mSAP board. The HDP substrate may have a small trace width and trace spacing, for example three μm or less, that enable the HDP substrate to be used as a pitch translator between the base die and the mSAP board, for example between a 110 μm pitch and a 210 μm pitch. One or more DRAM modules may be coupled with the mSAP board. The configuration has a reduced overall package height. Other embodiments may be described and/or claimed.

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