17848159. METHODS AND APPARATUS TO SCHEDULE MEMORY OPERATIONS simplified abstract (Texas Instruments Incorporated)
METHODS AND APPARATUS TO SCHEDULE MEMORY OPERATIONS
Organization Name
Texas Instruments Incorporated
Inventor(s)
Vignesh Raghavendra of Bangalore (IN)
Srirama Govindarajan of Bangalore (IN)
Prithvi Y.a. of Bangalore (IN)
METHODS AND APPARATUS TO SCHEDULE MEMORY OPERATIONS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17848159 titled 'METHODS AND APPARATUS TO SCHEDULE MEMORY OPERATIONS
Simplified Explanation
The abstract describes a device that includes a compute core, flash manager circuitry, and flash memory. The compute core sends a request to the flash manager circuitry to store write data in the flash memory, and then sends another request to transfer a read operation to the flash memory. The flash manager circuitry receives the requests and determines whether to preempt the storing of the write data in order to transmit the read operation to the flash memory. The flash memory provides data to the compute core based on the transmitted read operation.
- The device includes a compute core, flash manager circuitry, and flash memory.
- The compute core sends a request to store write data in the flash memory.
- The compute core also sends a request to transfer a read operation to the flash memory.
- The flash manager circuitry receives the requests from the compute core.
- The flash manager circuitry determines whether to preempt the storing of the write data.
- If preempted, the flash manager circuitry transmits the read operation to the flash memory.
- The flash memory provides data to the compute core based on the transmitted read operation.
Potential Applications
- This technology can be used in devices that require efficient storage and retrieval of data, such as smartphones, tablets, and IoT devices.
- It can be applied in systems that need to perform simultaneous read and write operations on flash memory.
Problems Solved
- The device solves the problem of efficiently managing read and write operations on flash memory.
- It addresses the issue of potential conflicts between storing write data and performing read operations.
Benefits
- The device allows for concurrent read and write operations on flash memory, improving overall system performance.
- It reduces the need for multiple memory accesses, leading to faster data retrieval.
- The technology provides a more efficient and streamlined approach to managing flash memory operations.
Original Abstract Submitted
An example device includes: a compute core configured to: send a first request to flash manager circuitry, the first request to store write data in a flash memory; and send a second request to the flash manager circuitry, the second request sent after the first request, the second request to transfer an XIP read operation to the flash memory; the flash manager circuitry configured to: receive the first request; transmit the write data to the flash memory for storing in the flash memory; receive the second request before the storing of the write data is complete; determine whether to preempt the storing of the write data, transmit, in response to a determination to preempt, the XIP read operation to the flash; and the flash memory configured to provide data to the compute core based on the transmitted XIP read operation.
