17847300. SYNCHRONIZED MAPPING FOR CACHE-AWARE LOAD BALANCING ACROSS MULTIPLE HOST DEVICES simplified abstract (Dell Products L.P.)

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SYNCHRONIZED MAPPING FOR CACHE-AWARE LOAD BALANCING ACROSS MULTIPLE HOST DEVICES

Organization Name

Dell Products L.P.

Inventor(s)

Peniel Charles of Bangalore (IN)

Venkatesh Doddamane Nagaraj of Bangalore (IN)

Amit Pundalik Anchi of Bangalore (IN)

SYNCHRONIZED MAPPING FOR CACHE-AWARE LOAD BALANCING ACROSS MULTIPLE HOST DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17847300 titled 'SYNCHRONIZED MAPPING FOR CACHE-AWARE LOAD BALANCING ACROSS MULTIPLE HOST DEVICES

Simplified Explanation

The patent application describes an apparatus that manages the mapping of logical storage devices in a storage system. The mapping assigns different ranges of logical block addresses to cache entities in the system. The apparatus receives mapping-related communications from host devices that have shared access to the logical storage device, modifies the stored mapping based on these communications, and sends mapping-related communications back to the host devices.

  • The apparatus manages the mapping of logical storage devices in a storage system.
  • It assigns different ranges of logical block addresses to cache entities in the system.
  • It receives mapping-related communications from host devices that share access to the logical storage device.
  • It modifies the stored mapping based on the received communications.
  • It sends mapping-related communications back to the host devices based on the modified mapping.

Potential Applications

  • Data storage systems
  • Cloud computing infrastructure
  • Virtualization platforms

Problems Solved

  • Efficiently managing the mapping of logical storage devices
  • Coordinating access to shared storage devices by multiple host devices

Benefits

  • Improved performance and efficiency in storage systems
  • Enhanced coordination and communication between host devices and storage systems
  • Simplified management of logical storage devices


Original Abstract Submitted

An apparatus in one embodiment comprises at least one processing device configured to store a mapping for each of a plurality of logical storage devices of a storage system, the mapping for a given one of the logical storage devices assigning different ranges of logical block addresses of that logical storage device to respective different cache entities of the storage system. The at least one processing device is further configured to receive at least one mapping-related communication from at least one of first and second host devices that have shared access to the given logical storage device, to modify the stored mapping for the given logical storage device based at least in part on the at least one received mapping-related communication, and to send at least one mapping-related communication to at least one of the first and second host devices based at least in part on the modified stored mapping.

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