17847257. PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-SPEED INTERCONNECTS simplified abstract (Intel Corporation)
PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-SPEED INTERCONNECTS
Organization Name
Inventor(s)
Cemil Geyik of Gilbert AZ (US)
Zhiguo Qian of Chandler AZ (US)
Kristof Kuwawi Darmawikarta of Chandler AZ (US)
Zhichao Zhang of Chandler AZ (US)
PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-SPEED INTERCONNECTS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17847257 titled 'PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-SPEED INTERCONNECTS
Simplified Explanation
The patent application describes a microelectronic assembly that includes a package substrate and an integrated circuit (IC) die. The package substrate has a conductive trace surrounded by a conductive structure coupled to a ground connection. The substrate also has alternating layers of metallization and dielectric material. The IC die is connected to the conductive trace through a conductive pathway.
- The microelectronic assembly includes a package substrate with a conductive trace and a conductive structure coupled to a ground connection.
- The package substrate has alternating layers of metallization and dielectric material.
- The IC die is connected to the conductive trace through a conductive pathway.
- The conductive trace includes a trench via in one of the dielectric layers.
- The conductive structure includes grounded plates that extend across the length and width of the package substrate in metallization layers on either side of the dielectric layer.
Potential Applications:
- Microelectronic devices and systems
- Integrated circuits
- Electronic packaging
Problems Solved:
- Provides a conductive pathway for connecting an IC die to a package substrate
- Ensures proper grounding of the conductive trace
- Improves the performance and reliability of microelectronic assemblies
Benefits:
- Enhanced electrical connectivity
- Improved signal integrity
- Increased reliability and performance of microelectronic assemblies
Original Abstract Submitted
Embodiments of a microelectronic assembly comprise: a package substrate comprising a conductive trace in a dielectric material, the conductive trace surrounded by a conductive structure coupled to a ground connection, the package substrate further comprising metallization layers alternating with dielectric layers of the dielectric material; and an integrated circuit (IC) die coupled to a surface of the package substrate, the IC die being coupled to the conductive trace by a conductive pathway. The dielectric layers and the metallization layers are parallel to the surface of the package substrate, the conductive trace comprises a trench via in one of the dielectric layers, and the conductive structure comprises grounded plates extending across a length and width of the package substrate in metallization layers on either side of the dielectric layer.