17847130. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Namhoon Kim of Gunpo-si (KR)

Kwangyoul Lee of Cheonan-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17847130 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The abstract describes a semiconductor package that includes two semiconductor chips connected by a chip connecting terminal and surrounded by an adhesive layer. The package also includes lower and upper dam structures on the edges of the top and bottom surfaces of the chips, respectively.

• The semiconductor package includes a first semiconductor chip and a second semiconductor chip.
• The first and second semiconductor chips are connected by a chip connecting terminal.
• The chip connecting terminal allows for electrical connection between the two chips.
• An adhesive layer surrounds the chip connecting terminal, providing structural support and protection.
• The lower dam structure is located on the edge of the top surface of the first semiconductor chip.
• The upper dam structure is located on the edge of the bottom surface of the second semiconductor chip.
• The dam structures help contain the adhesive layer and prevent leakage or damage.

Potential applications of this technology:

• Semiconductor packaging for various electronic devices such as smartphones, tablets, and computers.
• Integrated circuits and microprocessors used in automotive electronics, aerospace systems, and industrial equipment.

Problems solved by this technology:

• Provides a reliable and efficient method for connecting and packaging semiconductor chips.
• Helps prevent damage to the chips during handling and operation.
• Reduces the risk of electrical shorts or failures in the chip connections.

Benefits of this technology:

• Improved reliability and performance of semiconductor packages.
• Enhanced protection against physical and electrical damage.
• Simplified manufacturing process for semiconductor packaging.

Original Abstract Submitted

A semiconductor package includes a first semiconductor chip; a lower dam structure disposed on an edge of a top surface of the first semiconductor substrate; a second semiconductor chip, which is mounted on the first semiconductor chip; an upper dam structure disposed on an edge of the bottom surface of the second semiconductor substrate; a chip connecting terminal disposed between the first semiconductor chip and the second semiconductor chip and connecting the first semiconductor chip to the second semiconductor chip; and an adhesive layer disposed between the first semiconductor chip and the second semiconductor chip and surrounding the chip connecting terminal.