17847111. TECHNOLOGIES FOR OVERLAY METROLOGY MARKS simplified abstract (Intel Corporation)

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TECHNOLOGIES FOR OVERLAY METROLOGY MARKS

Organization Name

Intel Corporation

Inventor(s)

Martin N. Weiss of Portland OR (US)

TECHNOLOGIES FOR OVERLAY METROLOGY MARKS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17847111 titled 'TECHNOLOGIES FOR OVERLAY METROLOGY MARKS

Simplified Explanation

The patent application describes techniques for creating overlay metrology marks on semiconductor wafers. These marks consist of a series of grating lines on different layers of the wafer. When viewed from above, the marks create a moire pattern that changes as the positions of the marks shift.

  • The overlay metrology marks are formed on different layers of a semiconductor wafer.
  • The marks are made up of grating lines that create a moire pattern when viewed from above.
  • The moire pattern changes as the positions of the marks move.
  • At least one of the marks has non-uniform grating line spacing, allowing for a wider range of overlay errors to be detected.

Potential Applications

  • Semiconductor manufacturing
  • Metrology and alignment in the semiconductor industry

Problems Solved

  • Accurate measurement and alignment of different layers in semiconductor wafers
  • Detection of overlay errors in semiconductor manufacturing

Benefits

  • Improved accuracy in measuring and aligning different layers of semiconductor wafers
  • Ability to detect a wider range of overlay errors in manufacturing processes


Original Abstract Submitted

Techniques for forming overlay metrology marks are disclosed. In the illustrative embodiment, a first overlay metrology mark is on a first layer of a semiconductor wafer, and a second metrology mark is formed on a second layer above the first layer. The overlay metrology marks are embodied as a series of grating lines. Looking downward at the overlay metrology marks, the two metrology marks form a moire pattern, with the light and dark regions of the moire pattern moving as the relative positions of the overlay metrology marks move. In the illustrative embodiment, at least one of the overlay metrology marks has non-uniform grating line spacing. As a result, the moire pattern is not identical if the overlay metrology mark is shifted by one grating line, allowing for a wider range of overlay errors to be detected.