17846606. INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF FABRICATING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF FABRICATING THE SAME
Organization Name
Inventor(s)
Woojin Rim of Hwaseong-si (KR)
Hyeongyu You of Hwaseong-si (KR)
Minjae Jeong of Yongin-si (KR)
INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17846606 titled 'INTEGRATED CIRCUIT INCLUDING STANDARD CELL AND METHOD OF FABRICATING THE SAME
Simplified Explanation
The patent application describes an integrated circuit that consists of standard cells arranged in multiple rows. These standard cells include functional cells implemented as logic circuits, as well as filler cells that contain patterns from different parts of the circuit.
- The integrated circuit includes functional cells and filler cells.
- The filler cells contain patterns from the back end of line (BEOL), middle of line (MOL), and front end of line (FEOL).
- There are at least one first filler cell and at least one second filler cell, both having the same size.
- The density of patterns in the first filler cell is different from the density of patterns in the second filler cell.
Potential applications of this technology:
- Integrated circuits in various electronic devices such as smartphones, computers, and IoT devices.
- Semiconductor manufacturing companies can utilize this technology to improve the efficiency and performance of their integrated circuits.
Problems solved by this technology:
- Provides a more efficient arrangement of standard cells in an integrated circuit.
- Allows for better utilization of space on the integrated circuit.
- Helps in achieving higher performance and functionality in electronic devices.
Benefits of this technology:
- Improved efficiency and performance of integrated circuits.
- Optimal utilization of space on the integrated circuit.
- Enhanced functionality and capabilities of electronic devices.
Original Abstract Submitted
Provided is an integrated circuit including standard cells arranged over a plurality of rows. The standard cells may include: a plurality of functional cells each implemented as a logic circuit; and a plurality of filler cells including at least one first filler cell and at least one second filler cell that each include at least one pattern from among a back end of line (BEOL) pattern, a middle of line (MOL) pattern, and a front end of line (FEOL) pattern, and wherein the at least one first filler cell and the at least one second filler cell have a same size as each other, and a density of one of the at least one pattern of the at least one first filler cell is different from a density of one of the at least one pattern of the at least one second filler cell.
