17845679. SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING simplified abstract (Samsung Electronics Co., Ltd.)
SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING
Organization Name
Inventor(s)
Jongmin Gim of Milpitas CA (US)
Yang Seok Ki of Palo Alto CA (US)
SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17845679 titled 'SYSTEMS AND METHODS FOR EXPANDABLE MEMORY ERROR HANDLING
Simplified Explanation
The abstract describes a system for handling faulty pages in a memory pool. The system includes a host processor, host memory, and an expandable memory pool. The host memory contains instructions that, when executed by the host processor, perform various tasks related to handling faulty pages.
- The system detects errors in a target page of a memory device in the expandable memory pool.
- It generates an interrupt to alert the processor about the error.
- The system stores information about the faulty page in a log.
- It changes the status of the faulty page from a first state to a second state based on the information in the log.
Potential Applications
- This technology can be used in computer systems that rely on expandable memory pools, such as servers or data centers.
- It can be applied in systems where memory errors need to be detected and logged for further analysis or troubleshooting.
Problems Solved
- The system solves the problem of efficiently handling faulty pages in a memory pool.
- It provides a mechanism to detect errors and log information about the faulty pages.
- The system allows for the identification and management of faulty pages, ensuring the overall stability and reliability of the memory pool.
Benefits
- The system helps in identifying and addressing memory errors promptly, minimizing the impact on system performance and stability.
- It provides a systematic approach to track and manage faulty pages, enabling efficient troubleshooting and maintenance.
- The technology improves the overall reliability and availability of computer systems by effectively handling faulty pages in the memory pool.
Original Abstract Submitted
A system for handling faulty pages, including: a host processor; host memory connected to the host processor over a first memory interface; and an expandable memory pool connected to the host processor over a second memory interface different from the first memory interface, the host memory including instructions that, when executed by the host processor, cause the host processor to: detect an error in a target page of a first memory device of the expandable memory pool; generate an interrupt in response to detecting the error; store in a faulty page log, faulty page information corresponding to the target page of the first memory device; and change a status of the target page of the first memory device from a first state to a second state according to the faulty page log.
