17842262. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Pilsung Choi of Cheonan-si (KR)
Sangsoo Kim of Cheonan-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17842262 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The abstract describes a semiconductor package that includes a lower substrate, a semiconductor chip, an upper substrate, a connection structure, an encapsulant, and adhesive members.
- The lower substrate has a lower wiring layer.
- The semiconductor chip is placed on the lower substrate and has a first surface facing the lower substrate and a second surface opposite to the first surface.
- The upper substrate is positioned on top of the lower substrate and the semiconductor chip, and it has support members on its lower surface that protrude towards the second surface of the semiconductor chip.
- A connection structure is present between the lower substrate and the upper substrate.
- An encapsulant fills the space between the lower substrate and the upper substrate, encapsulating at least a portion of the semiconductor chip and the connection structure.
- Adhesive members are placed on the second surface of the semiconductor chip, corresponding to the support members on the upper substrate. The adhesive members are in contact with both the second surface of the chip and the support members.
Potential applications of this technology:
- Semiconductor packaging for electronic devices such as smartphones, computers, and IoT devices.
- Integrated circuits for automotive electronics, aerospace systems, and medical devices.
Problems solved by this technology:
- Provides a secure and reliable connection between the semiconductor chip and the upper substrate.
- Protects the semiconductor chip and the connection structure from external elements and mechanical stress.
Benefits of this technology:
- Enhanced durability and reliability of the semiconductor package.
- Improved thermal management due to the encapsulant.
- Simplified manufacturing process with the use of adhesive members.
Original Abstract Submitted
A semiconductor package includes: a lower substrate including a lower wiring layer; a semiconductor chip disposed on the lower substrate, the semiconductor chip including a first surface facing the lower substrate and a second surface opposite to the first surface; an upper substrate disposed on the lower substrate and the semiconductor chip, the upper substrate including a lower surface on which support members protruding toward the second surface of the semiconductor chip are disposed; a connection structure disposed between the lower substrate and the upper substrate; an encapsulant filling a space between the lower substrate and the upper substrate and encapsulating at least a portion of the semiconductor chip and the connection structure; and adhesive members disposed on the second surface of the semiconductor chip such as to correspond to the support members, respectively, the adhesive members disposed in contact with the second surface and the support members.
