17840744. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Junghoon Kang of Anyang-si (KR)
Junghyun Lee of Hwaseong-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 17840744 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The semiconductor package described in this patent application includes a lower redistribution structure with a bump pad and a lower redistribution pattern. The lower redistribution insulation layer of the package has sidewalls that define a cavity. Inside this cavity, there is a passive component, such as a resistor or capacitor, and an insulation filler that covers the sidewalls of the passive component. The package also includes a first semiconductor chip that is electrically connected to both the lower redistribution pattern and the passive component. An external connection bump is connected to the bump pad through a pad opening in the lower redistribution insulation layer.
- The semiconductor package includes a lower redistribution structure with a bump pad and a lower redistribution pattern.
- The lower redistribution insulation layer has sidewalls that define a cavity.
- The cavity contains a passive component and an insulation filler that covers the sidewalls of the passive component.
- The first semiconductor chip is electrically connected to both the lower redistribution pattern and the passive component.
- An external connection bump is connected to the bump pad through a pad opening in the lower redistribution insulation layer.
Potential Applications
This technology can be applied in various semiconductor devices and electronic systems, including:
- Integrated circuits
- Microprocessors
- Memory devices
- Power amplifiers
- Communication devices
Problems Solved
The semiconductor package described in this patent application addresses several challenges in semiconductor packaging, including:
- Providing a compact and efficient structure for integrating passive components into a semiconductor package.
- Ensuring proper electrical connections between the semiconductor chip, passive components, and external connections.
- Protecting the passive components from external environmental factors and potential damage.
Benefits
The use of this semiconductor package offers several benefits, including:
- Improved integration of passive components, reducing the overall size and complexity of the package.
- Enhanced electrical performance and reliability due to the optimized connections between components.
- Increased protection for passive components, leading to improved durability and longevity of the semiconductor package.
Original Abstract Submitted
A semiconductor package includes: a lower redistribution structure including a lower redistribution insulation layer, a bump pad in the lower redistribution insulation layer, and a lower redistribution pattern electrically connected to the bump pad, wherein the lower redistribution insulation layer includes: one or more sidewalls at least partially defining a cavity extending from a bottom surface of the lower redistribution insulation layer to an upper surface of the lower redistribution insulation layer; a passive component in the cavity of the lower redistribution insulation layer; an insulation filler in the cavity of the lower redistribution insulation layer, the insulation filler covering sidewalls of the passive component; a first semiconductor chip on the lower redistribution structure, the first semiconductor chip electrically connected to both the lower redistribution pattern and the passive component; and an external connection bump connected to the bump pad via a pad opening of the lower redistribution insulation layer.
