17840239. HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMING INTERFACE METHODS ON FPGA-BASED PROTOTYPE PLATFORMS simplified abstract (Intel Corporation)

HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMING INTERFACE METHODS ON FPGA-BASED PROTOTYPE PLATFORMS

Organization Name

Intel Corporation

Inventor(s)

Renu Patle of Folsom CA (US)

Hanmanthrao Patli of Folsom CA (US)

Rakesh Mehta of San Jose CA (US)

Hagay Spector of Sderot (IL)

Ivan Herrera Mejia of El Dorado Hills CA (US)

Fylur Rahman Sathakathulla of Folsom CA (US)

Gowtham Raj Karnam of Folsom CA (US)

Mohsin Ali of San Jose CA (US)

Sahar Sharabi of Beer Yaakov (IL)

Abraham Halevi Fraenkel of Jerusalem (IL)

Eyal Pniel of Susya (IL)

Ehud Cohn of Bruchin (IL)

Raghav Ramesh Lakshmi of Folsom CA (US)

Altug Koker of El Dorado Hills CA (US)

HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMING INTERFACE METHODS ON FPGA-BASED PROTOTYPE PLATFORMS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17840239 titled 'HARDWARE SOFTWARE COMMUNICATION CHANNEL TO SUPPORT DIRECT PROGRAMMING INTERFACE METHODS ON FPGA-BASED PROTOTYPE PLATFORMS

Simplified Explanation

The abstract describes a generic hardware/software communication (HSC) channel that allows the reuse of pre-silicon DPI methods for FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism, eliminating the need to re-implement the entire flow in pure hardware. Only a small layer of the transactor is converted into the FIFO based mechanism, while the core logic remains the same.

• The HSC channel enables the reuse of pre-silicon DPI methods for FPGA-based post-silicon validation.
• It translates a DPI interface into a hardware FIFO based mechanism.
• Only a small layer of the transactor is converted into the FIFO based mechanism, while the core logic remains the same.
• This allows for the reuse of methods without the need for complete re-implementation in pure hardware.

Potential Applications

The technology described in this patent application has potential applications in various fields, including:

• Post-silicon validation of integrated circuits.
• FPGA-based testing and verification.
• Hardware/software co-design and validation.

Problems Solved

The technology solves the following problems:

• Avoids the need for re-implementing the entire flow in pure hardware for post-silicon validation.
• Enables the reuse of pre-silicon DPI methods in FPGA-based validation.
• Provides a generic hardware/software communication channel for efficient testing and verification.

Benefits

The technology offers the following benefits:

• Saves time and effort by reusing pre-silicon DPI methods.
• Simplifies the post-silicon validation process by translating DPI interfaces into a hardware FIFO mechanism.
• Allows for efficient testing and verification of integrated circuits using FPGA-based solutions.

Original Abstract Submitted

Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.