17839724. METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
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METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 17839724 titled 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
Simplified Explanation
The patent application describes a method of manufacturing a semiconductor device. Here is a simplified explanation of the abstract:
- The method involves forming a hardmask layer on gate lines and intergate insulating portions that are arranged alternately.
- Mandrel lines are then formed on regions of the hardmask layer corresponding to every other intergate insulating portion.
- A spacer material layer is conformally formed on the hardmask layer, with a thickness matching the width of the gate lines.
- A mandrel material layer is deposited on the spacer material layer.
- Portions of the mandrel material layer are removed to expose parts of the spacer material layer on the upper and side surfaces of the mandrel line.
- The exposed portions of the spacer material layer are then removed, resulting in the formation of mandrel lines and stacked mandrel patterns.
- Finally, an opening is created in the hardmask layer using the mandrel lines and stacked mandrel patterns as a mask, which exposes a gate-cut region of the gate lines.
Potential applications of this technology:
- Manufacturing of semiconductor devices, such as integrated circuits and microprocessors.
Problems solved by this technology:
- Provides a method for accurately forming gate-cut regions in semiconductor devices.
- Enables precise patterning and alignment of gate lines and intergate insulating portions.
Benefits of this technology:
- Improved manufacturing process for semiconductor devices.
- Enhanced control over the formation of gate-cut regions.
- Higher accuracy and precision in patterning and alignment of gate lines.
Original Abstract Submitted
A method of manufacturing a semiconductor device may include forming a hardmask layer on gate lines and intergate insulating portions alternately arranged; respectively forming mandrel lines on regions of the hardmask layer, corresponding to every other one of the intergate insulating portions; conformally forming a spacer material layer, having a thickness corresponding to a width of the gate lines, on the hardmask layer; forming a mandrel material layer on the spacer material layer; removing a portion of the mandrel material layer to expose portions of the spacer material layer on an upper surface and a side surface of the mandrel line; removing the exposed portions of the spacer material layer to provide the mandrel lines and stacked mandrel patterns; and forming an opening in the hardmask layer, which exposes a gate-cut region of the gate lines, using the mandrel lines and the stacked mandrel patterns as a mask.
