17838994. DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FABRICATION THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Contents
DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FABRICATION THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Hai-Dang Trinh of Hsinchu (TW)
Min-Ying Tsai of Kaohsiung (TW)
Hsun-Chung Kuang of Hsinchu (TW)
Cheng-Yuan Tsai of Hsinchu (TW)
DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FABRICATION THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17838994 titled 'DEEP TRENCH ISOLATION STRUCTURE AND METHODS FOR FABRICATION THEREOF
Simplified Explanation
The patent application describes a Deep Trench Isolation (DTI) structure with a composite passivation layer. The composite passivation layer includes a hole accumulation layer and a defect repairing layer, which reduces lattice defects and the density of interface trap (DIT) at the interface. The hole accumulation layer is enhanced by an oxidization treatment.
- The DTI structure includes a composite passivation layer with a hole accumulation layer and a defect repairing layer.
- The defect repairing layer reduces lattice defects and the density of interface trap at the interface.
- The hole accumulation layer is enhanced by an oxidization treatment.
- The composite passivation layer improves the flat band voltage of the DTI structure.
Potential applications of this technology:
- Semiconductor manufacturing
- Integrated circuit fabrication
- Electronics industry
Problems solved by this technology:
- Reduces lattice defects and density of interface trap at the interface
- Improves the flat band voltage of the DTI structure
Benefits of this technology:
- Strong hole accumulation
- Increased performance and reliability of semiconductor devices
Original Abstract Submitted
A Deep Trench Isolation (DTI) structure is disclosed. The DTI structures according to embodiments of the present disclosure include a composite passivation layer. In some embodiments, the composite passivation layer includes a hole accumulation layer and a defect repairing layer. The defect repairing layer is disposed between the hole accumulation layer and a semiconductor substrate in which the DTI structure is formed. The defect repairing layer reduces lattice defects in the interface, thus, reducing the density of interface trap (DIT) at the interface. Reduced density of interface trap facilitates strong hole accumulation, thus increasing the flat band voltage. In some embodiments, the hole accumulation layer according to the present disclosure is enhanced by an oxidization treatment.
