17838384. THREE-DIMENSIONAL SEMICONDUCTOR DEVICES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
THREE-DIMENSIONAL SEMICONDUCTOR DEVICES
Organization Name
Inventor(s)
JAE HYUN Park of Hwaseong-si (KR)
DOYOUNG Choi of Hwaseong-si (KR)
THREE-DIMENSIONAL SEMICONDUCTOR DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17838384 titled 'THREE-DIMENSIONAL SEMICONDUCTOR DEVICES
Simplified Explanation
The patent application describes a three-dimensional semiconductor device that includes multiple active regions stacked on top of each other. Each active region has a channel pattern and source/drain patterns on opposing side surfaces.
- The device includes a lower active region with a lower channel pattern and lower source/drain patterns, and an upper active region with an upper channel pattern and upper source/drain patterns.
- A dummy channel pattern is placed between the lower and upper channel patterns.
- Liner layers are present on the side surfaces of the dummy channel pattern.
- A gate electrode is formed on the lower, dummy, and upper channel patterns, with a lower gate electrode on the lower channel pattern and an upper gate electrode on the upper channel pattern.
Potential applications of this technology:
- This technology can be used in the manufacturing of advanced semiconductor devices.
- It can be applied in the development of high-performance electronic devices such as smartphones, tablets, and computers.
Problems solved by this technology:
- The three-dimensional structure allows for increased integration of components in a smaller footprint.
- The presence of the dummy channel pattern and liner layers helps to improve device performance and reduce leakage current.
Benefits of this technology:
- The stacked active regions provide enhanced functionality and performance compared to traditional two-dimensional devices.
- The smaller footprint allows for more compact and efficient electronic devices.
- The improved device performance and reduced leakage current lead to better energy efficiency and longer battery life.
Original Abstract Submitted
Three-dimensional (3D) semiconductor device may include a first active region on a substrate, the first active region including a lower channel pattern and a pair of lower source/drain patterns that are on opposing side surfaces of the lower channel pattern respectively, a second active region stacked on the first active region, the second active region including an upper channel pattern and a pair of upper source/drain patterns that are on opposing side surfaces of the upper channel pattern, respectively, a dummy channel pattern between the lower and upper channel patterns, a pair of liner layers that are on opposing side surfaces of the dummy channel pattern, respectively, and a gate electrode on the lower, dummy, and upper channel patterns. The gate electrode may include a lower gate electrode on the lower channel pattern and an upper gate electrode on the upper channel pattern.
