17837958. METHOD AND APPARATUS FOR ETCHING A SEMICONDUCTOR SUBSTRATE IN A PLASMA ETCH CHAMBER simplified abstract (Applied Materials, Inc.)
METHOD AND APPARATUS FOR ETCHING A SEMICONDUCTOR SUBSTRATE IN A PLASMA ETCH CHAMBER
Organization Name
Inventor(s)
Daisuke Shimizu of Milpitas CA (US)
Li Ling of Santa Clara CA (US)
Hikaru Watanabe of Santa Clara CA (US)
Kenji Takeshita of Santa Clara CA (US)
METHOD AND APPARATUS FOR ETCHING A SEMICONDUCTOR SUBSTRATE IN A PLASMA ETCH CHAMBER - A simplified explanation of the abstract
This abstract first appeared for US patent application 17837958 titled 'METHOD AND APPARATUS FOR ETCHING A SEMICONDUCTOR SUBSTRATE IN A PLASMA ETCH CHAMBER
Simplified Explanation
The patent application describes methods and apparatus for etching a substrate in a plasma etch chamber. It introduces a new technique involving the application of a voltage waveform to an electrode in the substrate support during plasma exposure. This technique is performed in a series of macro etch cycles, each consisting of a first macro etch period and a second macro etch period. The first macro etch period includes multiple micro etch cycles, each having a bias power on (BPON) period and a bias power off (BPOFF) period. Notably, the duration of the BPON period is shorter than the duration of the BPOFF period. During the second macro etch period, bias power is predominantly not applied to the electrode.
- The patent application introduces a novel method for etching a substrate in a plasma etch chamber.
- It involves applying a voltage waveform to an electrode in the substrate support during plasma exposure.
- The etching process is performed in a series of macro etch cycles, each consisting of a first macro etch period and a second macro etch period.
- The first macro etch period includes multiple micro etch cycles, each having a bias power on (BPON) period and a bias power off (BPOFF) period.
- The duration of the BPON period is shorter than the duration of the BPOFF period.
- During the second macro etch period, bias power is predominantly not applied to the electrode.
Potential Applications
- Semiconductor manufacturing
- Microelectronics fabrication
- Nanotechnology research
Problems Solved
- Provides an improved method for etching substrates in a plasma etch chamber
- Enhances the etching process by introducing a voltage waveform and specific timing parameters
- Improves the uniformity and precision of etching results
Benefits
- Increased efficiency and effectiveness of substrate etching
- Improved control over the etching process
- Enhanced uniformity and precision in etching results
- Potential for higher throughput in semiconductor manufacturing and microelectronics fabrication
Original Abstract Submitted
Methods and apparatus for etching a substrate in a plasma etch chamber are provided. In one example, the method includes exposing a substrate disposed on a substrate supporting surface of a substrate support to a plasma within a processing chamber, and applying a voltage waveform to an electrode disposed in the substrate support while the substrate is exposed to the plasma during a plurality of macro etch cycles. Each macro etch cycle includes a first macro etch period and a second macro etch period. The macro etch period includes a plurality of micro etch cycles. Each micro etch cycle has a bias power on (BPON) period and a bias power off (BPOFF) period, wherein a duration of the BPON period being less than a duration of the BPOFF period. Bias power is predominantly not applied to the electrode during the second macro etch period.
